
ADS58H40IZCR
ActiveQUAD-CHANNEL, 14-BIT, 250-MSPS RECEIVER AND FEEDBACK IC
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ADS58H40IZCR
ActiveQUAD-CHANNEL, 14-BIT, 250-MSPS RECEIVER AND FEEDBACK IC
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS58H40IZCR |
|---|---|
| Architecture | Pipelined |
| Configuration | S/H-ADC |
| Data Interface | LVDS - Parallel |
| Features | Simultaneous Sampling |
| Input Type | Differential |
| Mounting Type | Surface Mount |
| Number of A/D Converters | 2 |
| Number of Bits | 14 |
| Number of Inputs | 4 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 144-LFBGA |
| Ratio - S/H:ADC | 1:1 |
| Reference Type | Internal |
| Sampling Rate (Per Second) | 250 M |
| Supplier Device Package | 144-NFBGA (10x10) |
| Voltage - Supply, Analog [Max] | 3.45 V, 2 V |
| Voltage - Supply, Analog [Min] | 3.15 V, 1.8 V |
| Voltage - Supply, Digital [Max] | 2 V |
| Voltage - Supply, Digital [Min] | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 184 | $ 242.22 | |
| Texas Instruments | JEDEC TRAY (10+1) | 1 | $ 215.65 | |
| 100 | $ 195.20 | |||
| 250 | $ 189.63 | |||
| 1000 | $ 185.91 | |||
Description
General part information
ADS58H40 Series
The ADS58H40 is a high-linearity, quad-channel, 14-bit, 250-MSPS analog-to-digital converter (ADC). The four ADC channels are separated into two blocks with two ADCs each. Each block can be individually configured into three different operating modes. One operating mode includes the implementation of the SNRBoost3G+signal processing technology to provide high signal-to-noise ratio (SNR) in a band up to 90 MHz wide with only 11-bit resolution. Designed for low power consumption and high spurious-free dynamic range (SFDR), the ADC has low-noise performance and outstanding SFDR over a large input frequency range.
The ADS58H40 is a high-linearity, quad-channel, 14-bit, 250-MSPS analog-to-digital converter (ADC). The four ADC channels are separated into two blocks with two ADCs each. Each block can be individually configured into three different operating modes. One operating mode includes the implementation of the SNRBoost3G+signal processing technology to provide high signal-to-noise ratio (SNR) in a band up to 90 MHz wide with only 11-bit resolution. Designed for low power consumption and high spurious-free dynamic range (SFDR), the ADC has low-noise performance and outstanding SFDR over a large input frequency range.
Documents
Technical documentation and resources