CDCM7005ZVAT
ActiveHIGH PERFORMANCE, LOW PHASE NOISE, LOW SKEW CLOCK SYNCHRONIZER THAT SYNCHRONIZES REF CLOCK TO VCXO
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CDCM7005ZVAT
ActiveHIGH PERFORMANCE, LOW PHASE NOISE, LOW SKEW CLOCK SYNCHRONIZER THAT SYNCHRONIZES REF CLOCK TO VCXO
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Technical Specifications
Parameters and characteristics for this part
| Specification | CDCM7005ZVAT |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Divider/Multiplier | Yes/No |
| Frequency - Max [Max] | 1.5 GHz |
| Input | LVCMOS, LVPECL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVPECL, LVCMOS |
| Package / Case | 64-LFBGA |
| PLL | Yes with Bypass |
| Ratio - Input:Output | 3:10 |
| Supplier Device Package | 64-BGA (8x8) |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 20.37 | |
| 10 | $ 18.79 | |||
| 25 | $ 17.94 | |||
| 100 | $ 16.04 | |||
| Tape & Reel (TR) | 250 | $ 15.30 | ||
| 500 | $ 14.57 | |||
| Texas Instruments | SMALL T&R | 1 | $ 17.35 | |
| 100 | $ 15.15 | |||
| 250 | $ 11.68 | |||
| 1000 | $ 10.45 | |||
Description
General part information
CDCM7005 Series
The CDCM7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes a VCXO (voltage controlled crystal oscillator) or VCO (voltage controlled oscillator) frequency to one of the two reference clocks. The programmable pre-divider M and the feedback-dividers N and P give a high flexibility to the frequency ratio of the reference clock to VC(X)O
VC(X)O_IN clock operates up to 2.2 GHz. Through the selection of external VC(X)O and loop filter components, the PLL loop bandwidth and damping factor can be adjust to meet different system requirements.
The CDCM7005 can lock to one of two reference clock inputs (PRI_REF and SEC_REF), supports frequency hold-over mode and fast-frequency-locking for fail-safe and increased system redundancy. The outputs of the CDCM7005 are user definable and can be any combination of up to five LVPECL outputs or up to 10 LVCMOS outputs. The built in synchronization latches ensure that all outputs are synchronized for low output skew.
Documents
Technical documentation and resources
