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Texas Instruments-TPS62142RGTT DC to DC Converter and Switching Regulator Chip Conv DC-DC 3V to 17V Synchronous Step Down Single-Out 3.3V 2A 16-Pin VQFN EP T/R
Integrated Circuits (ICs)

CDCLVD2102RGTT

Active
Texas Instruments

CLOCK FANOUT BUFFER 8-OUT 2-IN DUAL 1:2 16-PIN VQFN EP T/R

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Search across all available documentation for this part.

DocumentsDual 1:2 Low Additive Jitter LVDS Buffer datasheet (Rev. A)Low-Additive Jitter, Four LVDS Outputs Clock Buffer Evaluation Board
Texas Instruments-TPS62142RGTT DC to DC Converter and Switching Regulator Chip Conv DC-DC 3V to 17V Synchronous Step Down Single-Out 3.3V 2A 16-Pin VQFN EP T/R
Integrated Circuits (ICs)

CDCLVD2102RGTT

Active
Texas Instruments

CLOCK FANOUT BUFFER 8-OUT 2-IN DUAL 1:2 16-PIN VQFN EP T/R

Deep-Dive with AI

DocumentsDual 1:2 Low Additive Jitter LVDS Buffer datasheet (Rev. A)Low-Additive Jitter, Four LVDS Outputs Clock Buffer Evaluation Board

Technical Specifications

Parameters and characteristics for this part

SpecificationCDCLVD2102RGTT
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Frequency - Max [Max]800 MHz
InputLVDS, LVCMOS, LVPECL
Mounting TypeSurface Mount
Number of Circuits2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVDS
Package / Case16-VFQFN Exposed Pad
Ratio - Input:Output [custom]1:2
Supplier Device Package16-VQFN (3x3)
TypeFanout Buffer (Distribution)
Voltage - Supply [Max]2.625 V
Voltage - Supply [Min]2.375 V

CDCLVD2102 Series

Low jitter, dual 1:2 universal-to-LVDS buffer

PartInputDifferential - Input:Output [custom]Differential - Input:Output [custom]Package / CaseOperating Temperature [Max]Operating Temperature [Min]Frequency - Max [Max]Mounting TypeOutputVoltage - Supply [Min]Voltage - Supply [Max]Ratio - Input:Output [custom]Number of CircuitsTypeSupplier Device Package
Texas Instruments-TPS62142RGTT DC to DC Converter and Switching Regulator Chip Conv DC-DC 3V to 17V Synchronous Step Down Single-Out 3.3V 2A 16-Pin VQFN EP T/R
Texas Instruments
CDCLVD2102RGTT
LVCMOS
LVDS
LVPECL
16-VFQFN Exposed Pad
85 °C
-40 °C
800 MHz
Surface Mount
LVDS
2.375 V
2.625 V
1:2
2
Fanout Buffer (Distribution)
16-VQFN (3x3)
16-VFQFN
Texas Instruments
CDCLVD2102RGTR
LVCMOS
LVDS
LVPECL
16-VFQFN Exposed Pad
85 °C
-40 °C
800 MHz
Surface Mount
LVDS
2.375 V
2.625 V
1:2
2
Fanout Buffer (Distribution)
16-VQFN (3x3)

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 8.00
10$ 7.22
25$ 6.89
100$ 5.98
Digi-Reel® 1$ 8.00
10$ 7.22
25$ 6.89
100$ 5.98
Tape & Reel (TR) 250$ 5.71
500$ 5.21
1250$ 4.54
Texas InstrumentsSMALL T&R 1$ 6.12
100$ 4.99
250$ 3.92
1000$ 3.33

Description

General part information

CDCLVD2102 Series

The CDCLVD2102 clock buffer distributes two clock inputs (IN0, IN1) to a total of 4 pairs of differential LVDS clock outputs (OUT0, OUT3). Each buffer block consists of one input and 2 LVDS outputs. The inputs can either be LVDS, LVPECL, or LVCMOS.

The CDCLVD2102 is specifically designed for driving 50-transmission lines. If driving the inputs in single ended mode, the appropriate bias voltage (VAC_REF) should be applied to the unused negative input pin.

Using the control pin (EN), outputs can be either disabled or enabled. If the EN pin is left open two buffers with all outputs are enabled, if switched to a logical "0" both buffers with all outputs are disabled (static logical "0"), if switched to a logical "1", one buffer with two outputs is disabled and another buffer with two outputs is enabled. The part supports a fail safe function. It incorporates an input hysteresis, which prevents random oscillation of the outputs in absence of an input signal.