CY74FCT841CTQCT
Active10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
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CY74FCT841CTQCT
Active10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | CY74FCT841CTQCT |
|---|---|
| Circuit | 10:10 |
| Current - Output High, Low [custom] | 64 mA |
| Current - Output High, Low [custom] | 32 mA |
| Independent Circuits | 1 |
| Logic Type | D-Type Transparent Latch |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State |
| Package / Case | 24-SSOP |
| Package / Case [custom] | 0.154 ", 3.9 mm |
| Supplier Device Package | 24-SSOP |
| Voltage - Supply [Max] | 5.25 V |
| Voltage - Supply [Min] | 4.75 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.75 | |
| 10 | $ 1.58 | |||
| 25 | $ 1.49 | |||
| 100 | $ 1.27 | |||
| 250 | $ 1.19 | |||
| 500 | $ 1.04 | |||
| 1000 | $ 0.86 | |||
| Digi-Reel® | 1 | $ 1.75 | ||
| 10 | $ 1.58 | |||
| 25 | $ 1.49 | |||
| 100 | $ 1.27 | |||
| 250 | $ 1.19 | |||
| 500 | $ 1.04 | |||
| 1000 | $ 0.86 | |||
| Tape & Reel (TR) | 2500 | $ 0.80 | ||
| 5000 | $ 0.77 | |||
| 12500 | $ 0.74 | |||
| Texas Instruments | LARGE T&R | 1 | $ 1.32 | |
| 100 | $ 1.09 | |||
| 250 | $ 0.78 | |||
| 1000 | $ 0.59 | |||
Description
General part information
CY74FCT841T Series
The \x92FCT841T bus-interface latches are designed to eliminate additional packages required to buffer existing latches and provide additional data width for wider address/data paths or buses carrying parity. The \x92FCT841T devices are buffered 10-bit-wide versions of the FCT373 function.
The \x92FCT841T devices\x92 high-performance interface is designed for high-capacitance-load drive capability, while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
Documents
Technical documentation and resources
