
SN74ALVCH162268GR
Active12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS
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SN74ALVCH162268GR
Active12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ALVCH162268GR |
|---|---|
| Current - Output High, Low | 12 mA |
| Current - Output High, Low | 24 mA |
| Logic Type | Registered Bus Exchanger |
| Mounting Type | Surface Mount |
| Number of Circuits [Max] | 24 Bit |
| Number of Circuits [Min] | 12 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 6.1 mm |
| Package / Case | 0.24 in |
| Package / Case | 56-TFSOP |
| Supplier Device Package | 56-TSSOP |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 2.20 | |
| 10 | $ 1.98 | |||
| 25 | $ 1.87 | |||
| 100 | $ 1.59 | |||
| 250 | $ 1.49 | |||
| 500 | $ 1.31 | |||
| 1000 | $ 1.08 | |||
| Digi-Reel® | 1 | $ 2.20 | ||
| 10 | $ 1.98 | |||
| 25 | $ 1.87 | |||
| 100 | $ 1.59 | |||
| 250 | $ 1.49 | |||
| 500 | $ 1.31 | |||
| 1000 | $ 1.08 | |||
| Tape & Reel (TR) | 2000 | $ 1.01 | ||
| 6000 | $ 0.97 | |||
| 10000 | $ 0.93 | |||
| Texas Instruments | LARGE T&R | 1 | $ 1.66 | |
| 100 | $ 1.37 | |||
| 250 | $ 0.98 | |||
| 1000 | $ 0.74 | |||
Description
General part information
SN74ALVCH162268 Series
This 12-bit to 24-bit registered bus exchanger is designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVCH162268 is used for applications in which data must be transferred from a narrow high-speed bus to a wide, lower-frequency bus.
The device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input when the appropriate clock-enable (CLKEN)\ inputs are low. The select (SEL)\ line is synchronous with CLK and selects 1B or 2B input data for the A outputs.
Documents
Technical documentation and resources