Integrated Circuits (ICs)

MC14572UBDR2

Obsolete

ON Semiconductor

IC GATE HEX NAND/NOR/INV 16-SOIC

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Integrated Circuits (ICs)

MC14572UBDR2

Obsolete

ON Semiconductor

IC GATE HEX NAND/NOR/INV 16-SOIC

Deep-Dive with AI

DocumentsDatasheet

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	MC14572UBDR2

Current - Output High, Low [custom]	8.8 mA
Current - Output High, Low [custom]	3.5 mA
Logic Type	NAND/NOR Inverter Gate
Mounting Type	Surface Mount
Number of Circuits	6
Number of Inputs	8
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Single-Ended
Package / Case	16-SOIC
Package / Case [x]	0.154 in
Package / Case [y]	3.9 mm
Schmitt Trigger Input	False
Supplier Device Package	16-SOIC
Voltage - Supply [Max]	18 V
Voltage - Supply [Min]	3 V

MC14572UB Series

Hex Gate; 4 Inverters; 1 NOR; 1 NAND

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Min]	Operating Temperature [Max]	Logic Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Package / Case	Package / Case [x]	Package / Case [y]	Number of Inputs	Mounting Type	Output Type	Number of Circuits
ON Semiconductor MC14572UBDG	18 V	3 V	-55 °C	125 °C	NAND/NOR Inverter Gate	8.8 mA	3.5 mA	16-SOIC	16-SOIC	0.154 in	3.9 mm	8	Surface Mount	Single-Ended	6
ON Semiconductor MC14572UBD	18 V	3 V	-55 °C	125 °C	NAND/NOR Inverter Gate	8.8 mA	3.5 mA	16-SOIC	16-SOIC	0.154 in	3.9 mm	8	Surface Mount	Single-Ended	6
ON Semiconductor MC14572UBDR2	18 V	3 V	-55 °C	125 °C	NAND/NOR Inverter Gate	8.8 mA	3.5 mA	16-SOIC	16-SOIC	0.154 in	3.9 mm	8	Surface Mount	Single-Ended	6

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

MC14572UB Series

The MC14572UB hex functional gate is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. These complementary MOS logic gates find primary use where low power dissipation and/or high noise immunity is desired. The chip contains four inverters, one NOR gate and one NAND gate.

Documents

Technical documentation and resources