TMS5704357BGWTSEP
ActiveSPACE-ENHANCED PRODUCT HERCULES™ MICROCONTROLLER BASED ON ARM® CORTEX®-R CORE
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TMS5704357BGWTSEP
ActiveSPACE-ENHANCED PRODUCT HERCULES™ MICROCONTROLLER BASED ON ARM® CORTEX®-R CORE
Technical Specifications
Parameters and characteristics for this part
| Specification | TMS5704357BGWTSEP |
|---|---|
| Connectivity | SPI, Ethernet, LINbus, I2C, FlexRay, CANbus, UART/USART, MibSPI, EBI/EMI, SCI |
| Core Processor | ARM® Cortex®-R5F |
| Core Size | 32-Bit |
| Data Converters [custom] | 41 |
| Data Converters [custom] | 12 b |
| EEPROM Size | 128 K |
| Mounting Type | Surface Mount |
| Number of I/O | 145 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Oscillator Type | Internal |
| Package / Case | 337-LFBGA |
| Peripherals | WDT, DMA, PWM, POR |
| Program Memory Size | 4 MB |
| Program Memory Type | FLASH |
| RAM Size | 512 K |
| Speed | 300 MHz |
| Supplier Device Package | 337-NFBGA (16x16) |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Texas Instruments | JEDEC TRAY (10+1) | 1 | $ 3288.68 | |
| 10 | $ 2893.84 | |||
| 100 | $ 2499.00 | |||
Description
General part information
TMS570LC4357-SEP Series
The TMS570LC4357-SEP device is part of theHerculesTMS570 series of high-performance automotive-grade Arm® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with theHercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-SEP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.
The TMS570LC4357-SEP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66DMIPS/MHz, and can run up to 300MHz providing up to 498DMIPS. The device supports the big-endian [BE32] format.
The TMS570LC4357-SEP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.
Documents
Technical documentation and resources