854105AGLF
ObsoleteLOW SKEW,1-TO-4,LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
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854105AGLF
ObsoleteLOW SKEW,1-TO-4,LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 854105AGLF |
|---|---|
| Differential - Input:Output | No/Yes |
| Frequency - Max [Max] | 250 MHz |
| Input | LVCMOS, LVTTL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | LVDS |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Ratio - Input:Output | 1:4 |
| Supplier Device Package | 16-TSSOP |
| Type | Fanout Buffer (Distribution) |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 50 | $ 10.94 | |
Description
General part information
854105A Series
The 854105I is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer. Utilizing Low Voltage Differential Signaling (LVDS), the 854105I provides a low power, low noise solution for distributing clock signals over controlled impedances of 100?. The 854105I accepts an LVCMOS/LVTTL input level and translates it to LVDS output levels. Guaranteed output and part-to-part skew characteristics make the 854105I ideal for those applications demanding well defined performance and repeatability.
Documents
Technical documentation and resources
