Zenode.ai Logo
Beta
8-WSON
Integrated Circuits (ICs)

DS25BR110TSD/NOPB

Active
Texas Instruments

3.125-GBPS LVDS BUFFER WITH RECEIVE EQUALIZATION

8-WSON
Integrated Circuits (ICs)

DS25BR110TSD/NOPB

Active
Texas Instruments

3.125-GBPS LVDS BUFFER WITH RECEIVE EQUALIZATION

Technical Specifications

Parameters and characteristics for this part

SpecificationDS25BR110TSD/NOPB
ApplicationsLVDS
Current - Supply35 mA
Delay Time350 ps
InputLVDS
Mounting TypeSurface Mount
Number of Channels1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputLVDS
Package / Case8-WFDFN Exposed Pad
Signal ConditioningInput Equalization
Supplier Device Package8-WSON (3x3)
TypeReDriver, Buffer
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 6.08
10$ 5.46
25$ 5.16
100$ 4.47
250$ 4.24
500$ 3.81
Digi-Reel® 1$ 6.08
10$ 5.46
25$ 5.16
100$ 4.47
250$ 4.24
500$ 3.81
Tape & Reel (TR) 1000$ 3.21
2000$ 3.05
Texas InstrumentsSMALL T&R 1$ 4.18
100$ 3.40
250$ 2.68
1000$ 2.27

Description

General part information

DS25BR110 Series

The DS25BR110 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. A fully differential signal path ensures exceptional signal integrity and noise immunity.

The DS25BR110 features four levels of receive equalization (EQ), making it ideal for use as a receiver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space.