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56-TSSOP
Integrated Circuits (ICs)

SN74ALVC7806-40DL

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Texas Instruments

FIFO MEM ASYNC DUAL WIDTH UNI-DIR 256 X 18 56-PIN SSOP TUBE

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56-TSSOP
Integrated Circuits (ICs)

SN74ALVC7806-40DL

Active
Texas Instruments

FIFO MEM ASYNC DUAL WIDTH UNI-DIR 256 X 18 56-PIN SSOP TUBE

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ALVC7806-40DL
Access Time20 ns
Bus DirectionalUni-Directional
Current - Supply (Max) [Max]40 µA
Data Rate25 MHz
Expansion TypeWidth
FunctionAsynchronous
FWFT SupportFalse
Memory Size4.5 K
Mounting TypeSurface Mount
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Package / Case0.295 in
Package / Case56-BSSOP
Package / Case7.5 mm
Programmable Flags SupportTrue
Retransmit CapabilityFalse
Supplier Device Package56-SSOP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

SN74ALVC7806 Series

256 x 18 3.3-V asynchronous FIFO memory

PartRetransmit CapabilityFunctionData RatePackage / CasePackage / CasePackage / CaseBus DirectionalCurrent - Supply (Max) [Max]Mounting TypeSupplier Device PackageVoltage - Supply [Min]Voltage - Supply [Max]Programmable Flags SupportExpansion TypeOperating Temperature [Max]Operating Temperature [Min]Access TimeFWFT SupportMemory Size
56-TSSOP
Texas Instruments
Asynchronous
40 MHz
0.295 in
56-BSSOP
7.5 mm
Uni-Directional
40 µA
Surface Mount
56-SSOP
3 V
3.6 V
Width
70 °C
0 °C
18 ns
4.5 K
56-TSSOP
Texas Instruments
Asynchronous
25 MHz
0.295 in
56-BSSOP
7.5 mm
Uni-Directional
40 µA
Surface Mount
56-SSOP
3 V
3.6 V
Width
70 °C
0 °C
20 ns
4.5 K

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 160$ 15.05
Texas InstrumentsTUBE 1$ 19.48
100$ 17.02
250$ 13.12
1000$ 11.74

Description

General part information

SN74ALVC7806 Series

A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ALVC7806 is an 18-bit FIFO with high speed and fast access times. Data is processed at rates up to 40 MHz with access times of 18 ns in a bit-parallel format. These memories are designed for 3-V to 3.6-V VCCoperation.

Data is written into memory on a low-to-high transition of the load clock (LDCK) and is read out on a low-to-high transition of the unload clock

(UNCK). The memory is full when the number of words clocked in exceeds the number of words clocked out by 256. When the memory is full, LDCK has no effect on the data residing in memory. When the memory is empty, UNCK has no effect.