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Technical Specifications
Parameters and characteristics for this part
| Specification | CD4082BPWRE4 |
|---|---|
| Current - Output High, Low [custom] | 3.4 mA |
| Current - Output High, Low [custom] | 3.4 mA |
| Current - Quiescent (Max) [Max] | 1 çA |
| Input Logic Level - High [Max] | 11 V |
| Input Logic Level - High [Min] | 3.5 V |
| Input Logic Level - Low [Max] | 4 V |
| Input Logic Level - Low [Min] | 1.5 V |
| Logic Type | AND Gate |
| Max Propagation Delay @ V, Max CL | 90 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 2 |
| Number of Inputs | 4 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 14-TSSOP |
| Package / Case [custom] | 0.173 " |
| Package / Case [custom] | 4.4 mm |
| Supplier Device Package | 14-TSSOP |
| Voltage - Supply [Max] | 18 V |
| Voltage - Supply [Min] | 3 V |
CD4082B Series
2-ch 4-input 3-V to 18-V AND gate
| Part | Package / Case [x] | Package / Case [y] | Package / Case | Number of Inputs | Logic Type | Current - Quiescent (Max) [Max] | Voltage - Supply [Max] | Voltage - Supply [Min] | Input Logic Level - Low [Min] | Input Logic Level - Low [Max] | Max Propagation Delay @ V, Max CL | Operating Temperature [Min] | Operating Temperature [Max] | Current - Output High, Low [custom] | Current - Output High, Low [custom] | Number of Circuits | Mounting Type | Input Logic Level - High [Max] | Input Logic Level - High [Min] | Supplier Device Package | Package / Case [custom] | Package / Case [custom] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments | 0.154 in | 3.9 mm | 14-SOIC | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Surface Mount | 11 V | 3.5 V | |||
Texas Instruments | 14-TSSOP | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Surface Mount | 11 V | 3.5 V | 14-TSSOP | 0.173 " | 4.4 mm | ||
Texas Instruments | 0.3 " | 7.62 mm | 14-DIP | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Through Hole | 11 V | 3.5 V | |||
Texas Instruments | 0.154 in | 3.9 mm | 14-SOIC | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Surface Mount | 11 V | 3.5 V | |||
Texas Instruments | 14-TSSOP | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Surface Mount | 11 V | 3.5 V | 14-TSSOP | 0.173 " | 4.4 mm | ||
Texas Instruments | 14-TSSOP | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Surface Mount | 11 V | 3.5 V | 14-TSSOP | 0.173 " | 4.4 mm | ||
Texas Instruments | 0.154 in | 3.9 mm | 14-SOIC | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Surface Mount | 11 V | 3.5 V | |||
Texas Instruments | 0.3 " | 7.62 mm | 14-DIP | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Through Hole | 11 V | 3.5 V | |||
Texas Instruments | 0.154 in | 3.9 mm | 14-SOIC | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Surface Mount | 11 V | 3.5 V | |||
Texas Instruments | 0.154 in | 3.9 mm | 14-SOIC | 4 | AND Gate | 1 çA | 18 V | 3 V | 1.5 V | 4 V | 90 ns | -55 °C | 125 °C | 3.4 mA | 3.4 mA | 2 | Surface Mount | 11 V | 3.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
CD4082B Series
CD4073B, CD4081B and CD4082B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.
The CD4073B, CD4081B, and CD4082B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
CD4073B, CD4081B and CD4082B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.
Documents
Technical documentation and resources
No documents available