Integrated Circuits (ICs)

MC74HC74AFEL

Obsolete

ON Semiconductor

IC FF D-TYPE DUAL 1BIT 14SOEIAJ

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Integrated Circuits (ICs)

MC74HC74AFEL

Obsolete

ON Semiconductor

IC FF D-TYPE DUAL 1BIT 14SOEIAJ

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DocumentsDatasheet

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	MC74HC74AFEL

Clock Frequency	35 MHz
Current - Output High, Low [custom]	5.2 mA
Current - Output High, Low [custom]	5.2 mA
Current - Quiescent (Iq)	2 µA
Function	Reset, Set(Preset)
Input Capacitance	10 pF
Max Propagation Delay @ V, Max CL	17 ns
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Complementary
Package / Case	14-SOIC
Package / Case [x]	0.209 "
Package / Case [y]	5.3 mm
Supplier Device Package	SOEIAJ-14
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

MC74HC74A Series

Dual D Flip-Flop with Set and Reset

Part	Max Propagation Delay @ V, Max CL	Number of Bits per Element	Package / Case [x]	Package / Case [y]	Package / Case	Number of Elements	Mounting Type	Trigger Type	Clock Frequency	Function	Current - Quiescent (Iq)	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Output Type	Operating Temperature [Max]	Operating Temperature [Min]	Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Input Capacitance	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Package / Case [custom]	Package / Case [custom]
ON Semiconductor MC74HC74ADR2	17 ns	1	0.154 in	3.9 mm	14-SOIC	2	Surface Mount	Positive Edge	35 MHz	Reset Set(Preset)	2 µA	5.2 mA	5.2 mA	Complementary	125 °C	-55 °C	D-Type	2 V	6 V	10 pF
ON Semiconductor NLV74HC74ADG	17 ns	1	0.154 in	3.9 mm	14-SOIC	2	Surface Mount	Positive Edge	35 MHz	Reset Set(Preset)	2 µA	5.2 mA	5.2 mA	Complementary	125 °C	-55 °C	D-Type	2 V	6 V	10 pF
ON Semiconductor MM74HC74AMX	19 ns	1	0.154 in	3.9 mm	14-SOIC	2	Surface Mount	Positive Edge	94 MHz	Reset Set(Preset)	4 çA	5.2 mA	5.2 mA	Complementary			D-Type	2 V	6 V	5 pF	85 °C	-40 °C
ON Semiconductor 74HC74DTR2G	17 ns	1			14-TSSOP	2	Surface Mount	Positive Edge	28 MHz	Reset Set(Preset)	2 µA	5.2 mA	5.2 mA	Complementary	125 °C	-55 °C	D-Type	2 V	6 V	10 pF			14-TSSOP	0.173 "	4.4 mm
ON Semiconductor MC74HC74AF	17 ns	1	0.209 "	5.3 mm	14-SOIC	2	Surface Mount	Positive Edge	35 MHz	Reset Set(Preset)	2 µA	5.2 mA	5.2 mA	Complementary	125 °C	-55 °C	D-Type	2 V	6 V	10 pF			SOEIAJ-14
ON Semiconductor MC74HC74ANG	17 ns	1	0.3 "	7.62 mm	14-DIP	2	Through Hole	Positive Edge	35 MHz	Reset Set(Preset)	2 µA	5.2 mA	5.2 mA	Complementary	125 °C	-55 °C	D-Type	2 V	6 V	10 pF
ON Semiconductor MC74HC74AN	17 ns	1	0.3 "	7.62 mm	14-DIP	2	Through Hole	Positive Edge	35 MHz	Reset Set(Preset)	2 µA	5.2 mA	5.2 mA	Complementary	125 °C	-55 °C	D-Type	2 V	6 V	10 pF
ON Semiconductor MC74HC74ADTR2	17 ns	1			14-TSSOP	2	Surface Mount	Positive Edge	35 MHz	Reset Set(Preset)	2 µA	5.2 mA	5.2 mA	Complementary	125 °C	-55 °C	D-Type	2 V	6 V	10 pF			14-TSSOP	0.173 "	4.4 mm
ON Semiconductor MM74HC74AN	19 ns	1	0.3 "	7.62 mm	14-DIP	2	Through Hole	Positive Edge	94 MHz	Reset Set(Preset)	4 çA	5.2 mA	5.2 mA	Complementary			D-Type	2 V	6 V	5 pF	85 °C	-40 °C	14-MDIP
ON Semiconductor MC74HC74AFEL	17 ns	1	0.209 "	5.3 mm	14-SOIC	2	Surface Mount	Positive Edge	35 MHz	Reset Set(Preset)	2 µA	5.2 mA	5.2 mA	Complementary	125 °C	-55 °C	D-Type	2 V	6 V	10 pF			SOEIAJ-14

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

MC74HC74A Series

High-Performance Silicon-Gate CMOSThe MC574HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.This device consists of two D flip-flops with individual Set, Reset, and Clock inputs. Information at a D-input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Qbar outputs are available from each flip-flop. The Set and Reset inputs are asynchronous.

Documents

Technical documentation and resources