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Technical Specifications
Parameters and characteristics for this part
| Specification | CDC318ADLRG4 |
|---|---|
| Differential - Input:Output | False |
| Frequency - Max [Max] | 100 MHz |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | LVTTL, TTL |
| Package / Case | 48-BSSOP |
| Package / Case [y] | 0.295 in |
| Package / Case [y] | 7.5 mm |
| Ratio - Input:Output | 1:18 |
| Supplier Device Package | 48-SSOP |
| Type | Fanout Buffer (Distribution), Data |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 1000 | $ 4.96 | |
| 2000 | $ 4.77 | |||
Description
General part information
CDC318A Series
The CDC318A is a high-performance clock buffer designed to distribute high-speed clocks in PC applications. This device distributes one input (A) to 18 outputs (Y) with minimum skew for clock distribution. The CDC318A operates from a 3.3-V power supply. It is characterized for operation from 0°C to 70°C.
This device has been designed with consideration for optimized EMI performance. Depending on the application layout, damping resistors in series to the clock outputs (like proposed in the PC100 specification) may not be needed in most cases.
The device provides a standard mode (100K-bits/s) I2C serial interface for device control. The implementation is as a slave/receiver. The device address is specified in the I2C device address table. Both of the I2C inputs (SDATA and SCLOCK) are 5-V tolerant and provide integrated pullup resistors (typically 140 k).
Documents
Technical documentation and resources
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