Zenode.ai Logo
Beta
LCCC (FK)
Integrated Circuits (ICs)

SNJ54LVC573AFK

Active
Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

LCCC (FK)
Integrated Circuits (ICs)

SNJ54LVC573AFK

Active
Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSNJ54LVC573AFK
Circuit [custom]8
Circuit [custom]8
Current - Output High, Low24 mA
Delay Time - Propagation7.7 ns
Independent Circuits1
Logic TypeD-Type Transparent Latch
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output TypeTri-State, Non-Inverted
Package / Case20-CLCC
Supplier Device Package20-LCCC (8.89x8.89)
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsTUBE 1$ 45.77
100$ 40.68
250$ 33.45
1000$ 29.91

Description

General part information

SN54LVC573A Series

The SN54LVC573A octal transparent D-type latch is designed for 2.7-V to 3.6-V VCCoperation, and the SN74LVC573A octal transparent D-type latch is designed for 1.65-V to 3.6-V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers.

The SN54LVC573A octal transparent D-type latch is designed for 2.7-V to 3.6-V VCCoperation, and the SN74LVC573A octal transparent D-type latch is designed for 1.65-V to 3.6-V VCCoperation. These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers.

Documents

Technical documentation and resources

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Input and Output Characteristics of Digital Integrated Circuits

Application note

SNx4LVC573A Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. S)

Data sheet

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Logic Guide (Rev. AB)

Selection guide

Selecting the Right Level Translation Solution (Rev. A)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

LVC Characterization Information

Application note

How to Select Little Logic (Rev. A)

Application note

Texas Instruments Little Logic Application Report

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Signal Switch Data Book (Rev. A)

User guide

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Little Logic Guide 2018 (Rev. G)

Selection guide

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Live Insertion

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature