CD74AC138M96
Active3-LINE TO 8-LINE INVERTING DECODERS/DEMULTIPLEXERS
Deep-Dive with AI
Search across all available documentation for this part.
CD74AC138M96
Active3-LINE TO 8-LINE INVERTING DECODERS/DEMULTIPLEXERS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | CD74AC138M96 |
|---|---|
| Circuit | 1 x 3:8 |
| Current - Output High, Low | 24 mA |
| Independent Circuits | 1 |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Type | Decoder/Demultiplexer |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.5 V |
| Voltage Supply Source | Single Supply |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.64 | |
| 10 | $ 0.57 | |||
| 25 | $ 0.53 | |||
| 100 | $ 0.43 | |||
| 250 | $ 0.40 | |||
| 500 | $ 0.34 | |||
| 1000 | $ 0.27 | |||
| Digi-Reel® | 1 | $ 0.64 | ||
| 10 | $ 0.57 | |||
| 25 | $ 0.53 | |||
| 100 | $ 0.43 | |||
| 250 | $ 0.40 | |||
| 500 | $ 0.34 | |||
| 1000 | $ 0.27 | |||
| Tape & Reel (TR) | 2500 | $ 0.25 | ||
| 5000 | $ 0.23 | |||
| 12500 | $ 0.22 | |||
| 25000 | $ 0.21 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.54 | |
| 100 | $ 0.36 | |||
| 250 | $ 0.28 | |||
| 1000 | $ 0.19 | |||
Description
General part information
CD74AC138 Series
The ’AC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding.
The ’AC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding.
Documents
Technical documentation and resources
