Specification	SN74AHCT574PWR

Clock Frequency	115 MHz
Current - Output High, Low [custom]	8 mA
Current - Output High, Low [custom]	8 mA
Current - Quiescent (Iq)	4 çA
Function	Standard
Input Capacitance	3 pF
Max Propagation Delay @ V, Max CL	10.6 ns
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	20-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Supplier Device Package	20-TSSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74AHCT574 Series

Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Part	Clock Frequency	Number of Elements	Package / Case	Package / Case [y]	Package / Case [y]	Function	Trigger Type	Max Propagation Delay @ V, Max CL	Current - Quiescent (Iq)	Input Capacitance	Supplier Device Package	Output Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Min]	Voltage - Supply [Max]	Operating Temperature [Min]	Operating Temperature [Max]	Number of Bits per Element	Mounting Type	Type	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74AHCT574DWR	115 MHz	1	20-SOIC	0.295 in	7.5 mm	Standard	Positive Edge	10.6 ns	4 çA	3 pF	20-SOIC	Non-Inverted Tri-State	8 mA	8 mA	4.5 V	5.5 V	-40 °C	125 °C	8	Surface Mount	D-Type
Texas Instruments SN74AHCT574PWRG4	115 MHz	1	20-TSSOP	4.4 mm		Standard	Positive Edge	10.6 ns	4 çA	3 pF	20-TSSOP	Non-Inverted Tri-State	8 mA	8 mA	4.5 V	5.5 V	-40 °C	125 °C	8	Surface Mount	D-Type	0.173 in
Texas Instruments SN74AHCT574PWR	115 MHz	1	20-TSSOP	4.4 mm		Standard	Positive Edge	10.6 ns	4 çA	3 pF	20-TSSOP	Non-Inverted Tri-State	8 mA	8 mA	4.5 V	5.5 V	-40 °C	125 °C	8	Surface Mount	D-Type	0.173 in
Texas Instruments SN74AHCT574N	115 MHz	1	20-DIP			Standard	Positive Edge	10.6 ns	4 çA	3 pF	20-PDIP	Non-Inverted Tri-State	8 mA	8 mA	4.5 V	5.5 V	-40 °C	125 °C	8	Through Hole	D-Type		7.62 mm	0.3 in

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.42
		10	$ 0.36
		25	$ 0.34
		100	$ 0.27
		250	$ 0.25
		500	$ 0.21
		1000	$ 0.16
	Digi-Reel®	1	$ 0.42
		10	$ 0.36
		25	$ 0.34
		100	$ 0.27
		250	$ 0.25
		500	$ 0.21
		1000	$ 0.16
	Tape & Reel (TR)	2000	$ 0.15
		6000	$ 0.14
		10000	$ 0.13
		50000	$ 0.12
Texas Instruments	LARGE T&R	1	$ 0.28
		100	$ 0.19
		250	$ 0.14
		1000	$ 0.10

Description

General part information

SN74AHCT574 Series

The SNx4AHCT574 devices are octal edge-triggered D-type flip-flops that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads.

Documents

Technical documentation and resources

Datasheet

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Texas Instruments Little Logic Application Report

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

AHC/AHCT Designer's Guide February 2000 (Rev. D)

Design guide

SN74AHCT574PWR

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SN74AHCT574PWR

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Technical Specifications

SN74AHCT574 Series

Pricing

Description

SN74AHCT574 Series

Documents

Datasheet

Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

TI IBIS File Creation, Validation, and Distribution Processes

How to Select Little Logic (Rev. A)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

CMOS Power Consumption and CPD Calculation (Rev. B)

Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)

Logic Guide (Rev. AB)

Little Logic Guide 2018 (Rev. G)

Selecting the Right Level Translation Solution (Rev. A)

Power-Up Behavior of Clocked Devices (Rev. B)

Live Insertion

Design Summary for WCSP Little Logic (Rev. B)

LOGIC Pocket Data Book (Rev. B)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Texas Instruments Little Logic Application Report

Implications of Slow or Floating CMOS Inputs (Rev. E)

AHC/AHCT Designer's Guide February 2000 (Rev. D)

SN74AHCT574 Series