
NB3N1900KMNTWG
Active3.3 V 100/133 MHZ DIFFERENTIAL 1:19 HCSL CLOCK ZDB/FANOUT BUFFER FOR PCIE
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NB3N1900KMNTWG
Active3.3 V 100/133 MHZ DIFFERENTIAL 1:19 HCSL CLOCK ZDB/FANOUT BUFFER FOR PCIE
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Technical Specifications
Parameters and characteristics for this part
| Specification | NB3N1900KMNTWG |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Divider/Multiplier | False |
| Frequency - Max [Max] | 133.33 MHz |
| Input | Clock |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] [custom] | 158 °F |
| Operating Temperature [Min] [custom] | -10 °C |
| Output | HCSL |
| Package / Case | 72-VFQFN Exposed Pad |
| PLL | Yes with Bypass |
| Ratio - Input:Output | 1:19 |
| Supplier Device Package | 72-QFN (10x10) |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
NB3N1900K Series
The NB3N1900K differential clock buffers are designed to work inconjunction with a PCIe compliant source clock synthesizer to providepoint−to−point clocks to multiple agents. The device is capable ofdistributing the reference clocks for Intel® QuickPath Interconnect(Intel QPI & UPI), PCIe Gen1, Gen2, Gen3, Gen4. The NB3N1900K internal PLL isoptimized to support 100 MHz and 133 MHz frequency operation.The NB3N1900K supports HCSL output levels.
Documents
Technical documentation and resources