85102AGILFT
ObsoleteLOW SKEW,1-TO-2 DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER
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85102AGILFT
ObsoleteLOW SKEW,1-TO-2 DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER
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Technical Specifications
Parameters and characteristics for this part
| Specification | 85102AGILFT |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 500 MHz |
| Input | LVDS, LVHSTL, LVCMOS, LVPECL, LVTTL, HCSL, SSTL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | HCSL |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Ratio - Input:Output [custom] | 1:2 |
| Supplier Device Package | 16-TSSOP |
| Type | Fanout Buffer (Distribution), Multiplexer |
| Voltage - Supply [Max] | 3.63 V |
| Voltage - Supply [Min] | 2.97 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
85102I Series
The 85102I is a low skew, high performance 1-to-2 Differential-to-HCSL fanout buffer. The 85102I has a differential clock input. The CLK0, nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics make the 85102I ideal for those applications demanding well defined performance and repeatability.
Documents
Technical documentation and resources