Specification	SNJ54ABT125FK

Current - Output High, Low [custom]	24 mA
Current - Output High, Low [custom]	48 mA
Logic Type	Buffer, Non-Inverting
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	4
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	3-State
Package / Case	20-CLCC
Supplier Device Package	20-LCCC (8.89x8.89)
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN54ABT125 Series

Military 4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Part	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Elements	Logic Type	Output Type	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Number of Bits per Element	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type
Texas Instruments SNJ54ABT125FK	20-LCCC (8.89x8.89)	4.5 V	5.5 V	4	Buffer Non-Inverting	3-State	20-CLCC	125 °C	-55 °C	1	24 mA	48 mA	Surface Mount

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	TUBE	1	$ 41.71
		100	$ 37.08
		250	$ 30.48
		1000	$ 27.26

Description

General part information

SN54ABT125 Series

The ’ABT125 quadruple bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.

These devices are fully specified for hot-insertion applications using Ioffand power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Documents

Technical documentation and resources

SNJ54ABT125FK

Deep-Dive with AI

SNJ54ABT125FK

Deep-Dive with AI

Technical Specifications

SN54ABT125 Series

Pricing

Description

SN54ABT125 Series

Documents

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Designing With Logic (Rev. C)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Understanding Advanced Bus-Interface Products Design Guide

Live Insertion

Quad Flatpack No-Lead Logic Packages (Rev. D)

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

TI IBIS File Creation, Validation, and Distribution Processes

Input and Output Characteristics of Digital Integrated Circuits

Logic Guide (Rev. AB)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Advanced Bus Interface Logic Selection Guide

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Selecting the Right Level Translation Solution (Rev. A)

Implications of Slow or Floating CMOS Inputs (Rev. E)

SN54ABT125, SN74ABT125 datasheet (Rev. I)

LOGIC Pocket Data Book (Rev. B)

SN54ABT125 Series