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MC100ES6221 - Block Diagram
Integrated Circuits (ICs)

MC100ES6221AE

Obsolete
Renesas Electronics Corporation

LOW VOLTAGE 1:20 DIFFERENTIAL ECL/PECL/HSTL CLOCK FANOUT BUFFER

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MC100ES6221 - Block Diagram
Integrated Circuits (ICs)

MC100ES6221AE

Obsolete
Renesas Electronics Corporation

LOW VOLTAGE 1:20 DIFFERENTIAL ECL/PECL/HSTL CLOCK FANOUT BUFFER

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationMC100ES6221AE
Differential - Input:Output [custom]True
Differential - Input:Output [custom]True
Frequency - Max [Max]2 GHz
InputECL, HSTL, PECL
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]110 °C
Operating Temperature [Min]-40 °C
OutputLVPECL
Package / Case52-LQFP Exposed Pad
Ratio - Input:Output [custom]2:20
Supplier Device Package52-PTQFP (10x10)
TypeFanout Buffer (Distribution), Multiplexer
Voltage - Supply [Max]3.465 V
Voltage - Supply [Min]2.375 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$

Description

General part information

MC100ES6221 Series

The MC100ES6221 is a bipolar monolithic differential clock fanout buffer. Designed for most demanding clock distribution systems, the MC100ES6221 supports various applications that require the distribution of precisely aligned differential clock signals. Using SiGe technology and a fully differential architecture, the device offers very low skew outputs and superior digital signal characteristics. Target applications for this clock driver is high performance clock distribution in computing, networking and telecommunication systems.

Documents

Technical documentation and resources