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Technical Specifications
Parameters and characteristics for this part
| Specification | SN54LS273J |
|---|---|
| Clock Frequency | 40 MHz |
| Current - Output High, Low [custom] | 4 mA |
| Current - Output High, Low [custom] | 400 µA |
| Current - Quiescent (Iq) | 27 mA |
| Max Propagation Delay @ V, Max CL | 27 ns |
| Mounting Type | Through Hole |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Non-Inverted |
| Package / Case | 20-CDIP |
| Supplier Device Package | 20-CDIP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Texas Instruments | TUBE | 1 | $ 15.33 | |
| 100 | $ 13.39 | |||
| 250 | $ 10.32 | |||
| 1000 | $ 9.23 | |||
Description
General part information
SN54LS273 Series
These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input.
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.
These flip-flops are guaranteed to respond to clock frequencies ranging form 0 to 30 megahertz while maximum clock frequency is typically 40 megahertz. Typical power dissipation is 39 milliwatts per flip-flop for the ´273 and 10 milliwatts for the ´LS273.
Documents
Technical documentation and resources
