
ISL6524ACBZA-T
ObsoleteIC REG CTRLR PWM 4OUT 28SOIC
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ISL6524ACBZA-T
ObsoleteIC REG CTRLR PWM 4OUT 28SOIC
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Technical Specifications
Parameters and characteristics for this part
| Specification | ISL6524ACBZA-T |
|---|---|
| Applications | Intel VRM8.5, Controller |
| Mounting Type | Surface Mount |
| Number of Outputs | 4 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 28-SOIC |
| Package / Case [x] | 0.295 in |
| Package / Case [y] | 7.5 mm |
| Supplier Device Package | 28-SOIC |
| Voltage - Input [Max] | 13.2 V |
| Voltage - Input [Min] | 10.8 V |
| Voltage - Output | Multiple |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
ISL6524 Series
The ISL6524 provides the power control and protection for four output voltages in high-performance microprocessor and computer applications. The IC integrates one PWM controller and three linear controllers, as well as the monitoring and protection functions into a 28-pin SOIC package. The PWM controller regulates the microprocessor core voltage with a synchronous-rectified buck converter. One linear controller supplies the computer system's AGTL+ 1. 2V bus power. The other two linear controllers regulate power for the 1. 5V AGP bus and the 1. 8V power for the chip set core voltage and/or cache memory circuits. The ISL6524 includes an Intel VRM8. 5 compatible, TTL 5-input digital-to-analog converter (DAC) that adjusts the microprocessor core-targeted PWM output voltage from 1. 050V to 1. 825V in 25mV steps. The precision reference and voltage-mode control provide ±1% static regulation. The linear regulators use external N-channel MOSFETs or bipolar NPN pass transistors to provide fixed output voltages of 1. 2V ±3% (VOUT2), 1. 5V ±3% (VOUT3) and 1. 8V ±3% (VOUT4). The ISL6524 monitors all the output voltages. A delayedrising VTT (VOUT2 output) Power Good signal is issued before the core PWM starts to ramp up. Another system Power Good signal is issued when the core is within ±10% of the DAC setting and all other outputs are above their under- voltage levels. Additional built-in overvoltage protection for the core output uses the lower MOSFET to prevent output voltages above 115% of the DAC setting. The PWM controller's overcurrent function monitors the output current by using the voltage drop across the upper MOSFET's rDS(ON), eliminating the need for a current sensing resistor.
Documents
Technical documentation and resources