SN74ALVCH16841DLR
Active20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS
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SN74ALVCH16841DLR
Active20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ALVCH16841DLR |
|---|---|
| Circuit | 10:10 |
| Current - Output High, Low | 24 mA |
| Delay Time - Propagation | 1 ns |
| Independent Circuits | 2 |
| Logic Type | D-Type Transparent Latch |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State |
| Package / Case | 0.295 in |
| Package / Case | 56-BSSOP |
| Package / Case | 7.5 mm |
| Supplier Device Package | 56-SSOP |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 5.28 | |
| 10 | $ 4.74 | |||
| 25 | $ 4.48 | |||
| 100 | $ 3.88 | |||
| 250 | $ 3.68 | |||
| 500 | $ 3.31 | |||
| Digi-Reel® | 1 | $ 5.28 | ||
| 10 | $ 4.74 | |||
| 25 | $ 4.48 | |||
| 100 | $ 3.88 | |||
| 250 | $ 3.68 | |||
| 500 | $ 3.31 | |||
| Tape & Reel (TR) | 1000 | $ 2.79 | ||
| 2000 | $ 2.65 | |||
| Texas Instruments | LARGE T&R | 1 | $ 3.98 | |
| 100 | $ 3.49 | |||
| 250 | $ 2.45 | |||
| 1000 | $ 1.97 | |||
Description
General part information
SN74ALVCH16841 Series
This 20-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVCH16841 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.
The SN74ALVCH16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
Documents
Technical documentation and resources