Zenode.ai Logo
Beta
Texas Instruments-SN74LVC1G00DRLR Logic Gates NAND Gate 1-Element 2-IN CMOS 5-Pin SOT-553 T/R
Circuit Protection

TPD4E002DRL2

Active
Texas Instruments

6.1V SOT-553-5 ESD AND SURGE PROTECTION (TVS/ESD) ROHS

Texas Instruments-SN74LVC1G00DRLR Logic Gates NAND Gate 1-Element 2-IN CMOS 5-Pin SOT-553 T/R
Circuit Protection

TPD4E002DRL2

Active
Texas Instruments

6.1V SOT-553-5 ESD AND SURGE PROTECTION (TVS/ESD) ROHS

Technical Specifications

Parameters and characteristics for this part

SpecificationTPD4E002DRL2
ApplicationsGeneral Purpose
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / CaseSOT-553
Power - Peak Pulse35 W
Power Line ProtectionFalse
Supplier Device PackageSOT-5
TypeZener
Unidirectional Channels [custom]4
Voltage - Breakdown (Min) [Min]6.1 V
Voltage - Reverse Standoff (Typ)3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.43
10$ 0.37
100$ 0.25
500$ 0.20
1000$ 0.16
2000$ 0.14
Digi-Reel® 1$ 0.43
10$ 0.37
100$ 0.25
500$ 0.20
1000$ 0.16
2000$ 0.14
Tape & Reel (TR) 4000$ 0.12
LCSCPiece 1$ 0.09
10$ 0.09
30$ 0.09
100$ 0.09
Texas InstrumentsLARGE T&R 1$ 0.28
100$ 0.19
250$ 0.15
1000$ 0.10

Description

General part information

TPD4E002 Series

The TPD4E002 device is a transient voltage suppressor (TVS) designed to protect up to four lines against electrostatic discharge (ESD) transients. The monolithic circuit design allows superior capacitance matching between the channels and reduced crosstalk. This device is ideal for applications where both reduced line capacitance and board space-saving are required.

The TPD4E002 device is a transient voltage suppressor (TVS) designed to protect up to four lines against electrostatic discharge (ESD) transients. The monolithic circuit design allows superior capacitance matching between the channels and reduced crosstalk. This device is ideal for applications where both reduced line capacitance and board space-saving are required.