CDCLVD2108RGZT
Active2.375V~2.625V 800MHZ VQFN-48-EP(7X7) CLOCK BUFFERS, DRIVERS, DISTRIBUTORS ROHS
Deep-Dive with AI
Search across all available documentation for this part.
CDCLVD2108RGZT
Active2.375V~2.625V 800MHZ VQFN-48-EP(7X7) CLOCK BUFFERS, DRIVERS, DISTRIBUTORS ROHS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | CDCLVD2108RGZT |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 800 MHz |
| Input | LVDS, LVCMOS, LVPECL |
| Mounting Type | Surface Mount |
| Number of Circuits | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVDS |
| Package / Case | 48-VFQFN Exposed Pad |
| Ratio - Input:Output | 1:8 |
| Supplier Device Package | 48-VQFN (7x7) |
| Type | Fanout Buffer (Distribution) |
| Voltage - Supply [Max] | 2.625 V |
| Voltage - Supply [Min] | 2.375 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 14.11 | |
| 10 | $ 12.97 | |||
| 25 | $ 12.43 | |||
| 100 | $ 10.95 | |||
| Digi-Reel® | 1 | $ 14.11 | ||
| 10 | $ 12.97 | |||
| 25 | $ 12.43 | |||
| 100 | $ 10.95 | |||
| Tape & Reel (TR) | 250 | $ 8.32 | ||
| LCSC | Piece | 1 | $ 25.37 | |
| 250 | $ 9.82 | |||
| 500 | $ 9.47 | |||
| 1000 | $ 9.30 | |||
| Texas Instruments | SMALL T&R | 1 | $ 11.04 | |
| 100 | $ 9.65 | |||
| 250 | $ 7.44 | |||
| 1000 | $ 6.65 | |||
Description
General part information
CDCLVD2108 Series
The CDCLVD2108 clock buffer distributes two clock inputs (IN0, IN1) to a total of 16 pairs of differential LVDS clock outputs (OUT0, OUT15). Each buffer block consists of one input and 8 LVDS outputs. The inputs can either be LVDS, LVPECL, or LVCMOS.
The CDCLVD2108 is specifically designed for driving 50-transmission lines. In case of driving the inputs in single ended mode, the appropriate bias voltage (VAC_REF) should be applied to the unused negative input pin.
Using the control pin (EN) outputs can be either disabled or enabled. If the EN pin is left open all outputs are active, if switched to a logical "0" all outputs are disabled (static logical 0), if switched to a logical "1", OUT (8..15) are switched off and OUT (0..7) are active. The part supports a fail safe function. It incorporates an input hysteresis, which prevents random oscillation of the outputs in absence of an input signal.
Documents
Technical documentation and resources