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TSSOP (PW)
Integrated Circuits (ICs)

CD4532BPWR

Active
Texas Instruments

IC PRIORITY ENCOD 1X8:3 16TSSOP

Deep-Dive with AI

Search across all available documentation for this part.

DocumentsSemiconductor Packing Material Electrostatic Discharge (ESD) ProtectionUnderstanding Buffered and Unbuffered CD4xxxB Series Device Characteristics+5
TSSOP (PW)
Integrated Circuits (ICs)

CD4532BPWR

Active
Texas Instruments

IC PRIORITY ENCOD 1X8:3 16TSSOP

Deep-Dive with AI

DocumentsSemiconductor Packing Material Electrostatic Discharge (ESD) ProtectionUnderstanding Buffered and Unbuffered CD4xxxB Series Device Characteristics+5

Technical Specifications

Parameters and characteristics for this part

SpecificationCD4532BPWR
Circuit [custom]3
Circuit [custom]8
Circuit [custom]1
Current - Output High, Low [custom]6.8 mA
Current - Output High, Low [custom]6.8 mA
Independent Circuits1
Mounting TypeSurface Mount
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case16-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
Supplier Device Package16-TSSOP
TypePriority Encoder
Voltage - Supply [Max]18 V
Voltage - Supply [Min]3 V
Voltage Supply SourceDual Supply

CD4532B Series

CMOS 8-Bit Priority Encoder

PartVoltage Supply SourceTypeIndependent CircuitsCircuit [custom]Circuit [custom]Circuit [custom]Mounting TypeVoltage - Supply [Max]Voltage - Supply [Min]Operating Temperature [Min]Operating Temperature [Max]Package / Case [x]Package / CasePackage / Case [y]Current - Output High, Low [custom]Current - Output High, Low [custom]Supplier Device Package
16-TSSOP
Texas Instruments
CD4532BPWG4
Dual Supply
Priority Encoder
1
3
8
1
Surface Mount
18 V
3 V
-55 °C
125 °C
0.173 in
16-TSSOP
4.4 mm
6.8 mA
6.8 mA
16-TSSOP
16-TSSOP
Texas Instruments
CD4532BPWE4
Dual Supply
Priority Encoder
1
3
8
1
Surface Mount
18 V
3 V
-55 °C
125 °C
0.173 in
16-TSSOP
4.4 mm
6.8 mA
6.8 mA
16-TSSOP
16 SOIC
Texas Instruments
CD4532BM
Dual Supply
Priority Encoder
1
3
8
1
Surface Mount
18 V
3 V
-55 °C
125 °C
0.154 in
16-SOIC
3.9 mm
6.8 mA
6.8 mA
16-SOIC
16 SOIC
Texas Instruments
CD4532BMG4
Dual Supply
Priority Encoder
1
3
8
1
Surface Mount
18 V
3 V
-55 °C
125 °C
0.154 in
16-SOIC
3.9 mm
6.8 mA
6.8 mA
16-SOIC
TSSOP (PW)
Texas Instruments
CD4532BPWR
Dual Supply
Priority Encoder
1
3
8
1
Surface Mount
18 V
3 V
-55 °C
125 °C
0.173 in
16-TSSOP
4.4 mm
6.8 mA
6.8 mA
16-TSSOP
16-TSSOP
Texas Instruments
CD4532BPW
Dual Supply
Priority Encoder
1
3
8
1
Surface Mount
18 V
3 V
-55 °C
125 °C
0.173 in
16-TSSOP
4.4 mm
6.8 mA
6.8 mA
16-TSSOP

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.52
10$ 0.44
25$ 0.41
100$ 0.33
250$ 0.31
500$ 0.26
1000$ 0.20
Digi-Reel® 1$ 0.52
10$ 0.44
25$ 0.41
100$ 0.33
250$ 0.31
500$ 0.26
1000$ 0.20
Tape & Reel (TR) 2000$ 0.15
Texas InstrumentsLARGE T&R 1$ 0.39
100$ 0.26
250$ 0.20
1000$ 0.13

Description

General part information

CD4532B Series

CD4532B consists of combinational logic that encodes the highest priority input (D7-D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority; D7 is the highest priority and D0 is the lowest. The priority encoder is inhibited when the chip-enable input EIis low. When EIis high, the binary representation of the highest-priority input appears on output lines Q2-Q0, and the group select line GS is high to indicate that priority inputs are present. The enable-out (EO) is high when no priority inputs are present. If any one input is high, EOis low and all cascaded lower-order stages are disabled.

The CD4532B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4532B consists of combinational logic that encodes the highest priority input (D7-D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority; D7 is the highest priority and D0 is the lowest. The priority encoder is inhibited when the chip-enable input EIis low. When EIis high, the binary representation of the highest-priority input appears on output lines Q2-Q0, and the group select line GS is high to indicate that priority inputs are present. The enable-out (EO) is high when no priority inputs are present. If any one input is high, EOis low and all cascaded lower-order stages are disabled.