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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74GTLPH1645ZQLR |
|---|---|
| Channel Type | Bidirectional |
| Channels per Circuit | 8 |
| Input Signal | LVTTL |
| Mounting Type | Surface Mount |
| Number of Circuits | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Signal | GTLP |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 56-VFBGA |
| Supplier Device Package | 56-BGA Microstar Junior (7x4.5) |
| Translator Type | Mixed Signal |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
SN74GTLPH1645 Series
The SN74GTLPH1645 is a high-drive, 16-bit bus transceiver that provides LVTTL-to-GTLP and GTLP-to-LVTTL signal-level translation. It is partitioned as two 8-bit transceivers. The device provides a high-speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP signal levels. High-speed (about three times faster than standard LVTTL or TTL) backplane operation is a direct result of GTLP's reduced output swing (<1 V), reduced input threshold levels, improved differential input, OEC™ circuitry, and TI-OPC™ circuitry. Improved GTLP OEC and TI-OPC circuits minimize bus-settling time and have been designed and tested using several backplane models. The high drive allows incident-wave switching in heavily loaded backplanes with equivalent load impedance down to 11.
GTLP is the Texas Instruments derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3. The ac specification of the SN74GTLPH1645 is given only at the preferred higher noise-margin GTLP, but the user has the flexibility of using this device at either GTL (VTT= 1.2 V and VREF= 0.8 V) or GTLP (VTT= 1.5 V and VREF= 1 V) signal levels.
Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels but are 5-V tolerant and are compatible with TTL and 5-V CMOS inputs. VREFis the B-port differential input reference voltage.
Documents
Technical documentation and resources
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