
MC74AC273DTR2G
ActiveFLIP FLOP, 74AC273, D, 9 NS, 175 MHZ, 24 MA, 20 PINS, WTSSOP
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MC74AC273DTR2G
ActiveFLIP FLOP, 74AC273, D, 9 NS, 175 MHZ, 24 MA, 20 PINS, WTSSOP
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Technical Specifications
Parameters and characteristics for this part
| Specification | MC74AC273DTR2G |
|---|---|
| Current - Output High, Low | 24 mA |
| Current - Quiescent (Iq) | 8 ÁA |
| Input Capacitance | 4.5 pF |
| Max Propagation Delay @ V, Max CL | 9 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Non-Inverted |
| Package / Case | 20-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Supplier Device Package | 20-TSSOP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
MC74AC273 Series
Octal D Flip-Flop
| Part | Supplier Device Package | Trigger Type | Mounting Type | Number of Bits per Element | Output Type | Operating Temperature [Max] | Operating Temperature [Min] | Current - Output High, Low | Current - Quiescent (Iq) | Input Capacitance | Max Propagation Delay @ V, Max CL | Number of Elements | Voltage - Supply [Min] | Voltage - Supply [Max] | Type | Package / Case [y] | Package / Case | Package / Case [x] | Package / Case | Package / Case | Package / Case [y] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ON Semiconductor | 20-TSSOP | Positive Edge | Surface Mount | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 8 ÁA | 4.5 pF | 9 ns | 1 | 2 V | 6 V | D-Type | 4.4 mm | 20-TSSOP | 0.173 in | |||
ON Semiconductor | 20-PDIP | Positive Edge | Through Hole | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 8 ÁA | 4.5 pF | 9 ns | 1 | 2 V | 6 V | D-Type | 20-DIP | 7.62 mm | 0.3 in | |||
ON Semiconductor | SOEIAJ-20 | Positive Edge | Surface Mount | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 8 ÁA | 4.5 pF | 9 ns | 1 | 2 V | 6 V | D-Type | 20-SOIC | 5.3 mm | 0.209 " | |||
ON Semiconductor | 20-TSSOP | Positive Edge | Surface Mount | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 8 ÁA | 4.5 pF | 9 ns | 1 | 2 V | 6 V | D-Type | 4.4 mm | 20-TSSOP | 0.173 in | |||
ON Semiconductor | 20-SOP | Positive Edge | Surface Mount | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 4.5 pF | 10 ns | 1 | 2 V | 6 V | D-Type | 20-SOIC | 5.3 mm | 0.209 " | ||||
ON Semiconductor | 20-SOIC | Positive Edge | Surface Mount | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 8 ÁA | 4.5 pF | 9 ns | 1 | 2 V | 6 V | D-Type | 0.295 in | 20-SOIC | 7.5 mm | |||
ON Semiconductor | SOEIAJ-20 | Positive Edge | Surface Mount | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 8 ÁA | 4.5 pF | 9 ns | 1 | 2 V | 6 V | D-Type | 20-SOIC | 5.3 mm | 0.209 " | |||
ON Semiconductor | 20-PDIP | Positive Edge | Through Hole | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 8 ÁA | 4.5 pF | 9 ns | 1 | 2 V | 6 V | D-Type | 20-DIP | 7.62 mm | 0.3 in | |||
ON Semiconductor | 20-SOIC | Positive Edge | Surface Mount | 8 | Non-Inverted | 85 °C | -40 °C | 24 mA | 4.5 pF | 10 ns | 1 | 2 V | 6 V | D-Type | 0.295 in | 20-SOIC | 7.5 mm |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.45 | |
| 10 | $ 0.88 | |||
| 25 | $ 0.73 | |||
| 100 | $ 0.58 | |||
| 250 | $ 0.50 | |||
| 500 | $ 0.46 | |||
| 1000 | $ 0.42 | |||
| Digi-Reel® | 1 | $ 1.45 | ||
| 10 | $ 0.88 | |||
| 25 | $ 0.73 | |||
| 100 | $ 0.58 | |||
| 250 | $ 0.50 | |||
| 500 | $ 0.46 | |||
| 1000 | $ 0.42 | |||
| Tape & Reel (TR) | 2500 | $ 0.38 | ||
| 5000 | $ 0.36 | |||
| 7500 | $ 0.35 | |||
| 12500 | $ 0.33 | |||
| 17500 | $ 0.33 | |||
| Newark | Each (Supplied on Cut Tape) | 1000 | $ 0.43 | |
| ON Semiconductor | N/A | 1 | $ 0.35 | |
Description
General part information
MC74AC273 Series
The MC74AC273/74ACT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip- flop's Q output.All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.
Documents
Technical documentation and resources