SN54HC273VTDG2
ActiveOCTAL D-TYPE FLIP FLOPS WITH - CLEAR, SN54HC273-DIE
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SN54HC273VTDG2
ActiveOCTAL D-TYPE FLIP FLOPS WITH - CLEAR, SN54HC273-DIE
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN54HC273VTDG2 |
|---|---|
| Current - Output High, Low [custom] | 5.2 mA |
| Current - Output High, Low [custom] | 5.2 mA |
| Logic Type | AND Gate |
| Number of Circuits | 4 |
| Number of Inputs | 2 |
| Package / Case | Die |
| Supplier Device Package | Die |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 10 | $ 106.89 | |
| Texas Instruments | JEDEC TRAY (5+1) | 1 | $ 140.75 | |
| 10 | $ 124.19 | |||
| 100 | $ 82.79 | |||
Description
General part information
SN54HC273-DIE Series
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
Documents
Technical documentation and resources