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20-DIP
Integrated Circuits (ICs)

SN74LS373N

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Texas Instruments

OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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20-DIP
Integrated Circuits (ICs)

SN74LS373N

Active
Texas Instruments

OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LS373N
Circuit [custom]8
Circuit [custom]8
Current - Output High, Low [custom]24 mA
Current - Output High, Low [custom]2.6 mA
Delay Time - Propagation12 ns
Independent Circuits1
Logic TypeD-Type Transparent Latch
Mounting TypeThrough Hole
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Output TypeTri-State
Package / Case20-DIP
Package / Case7.62 mm
Package / Case0.3 in
Supplier Device Package20-PDIP
Voltage - Supply [Max]5.25 V
Voltage - Supply [Min]4.75 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 1.13
20$ 1.01
40$ 0.96
100$ 0.79
260$ 0.73
500$ 0.65
1000$ 0.51
2500$ 0.48
5000$ 0.45
Texas InstrumentsTUBE 1$ 0.83
100$ 0.64
250$ 0.47
1000$ 0.34

Description

General part information

SN74LS373 Series

These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The high-impedance 3-state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pullup components. These devices are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the ’LS373 and ’S373 are transparent D-type latches, meaning that while the enable (C or CLK) input is high, the Q outputs follow the data (D) inputs. When C or CLK is taken low, the output is latched at the level of the data that was set up.

The eight flip-flops of the ’LS374 and ’S374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs are set to the logic states that were set up at the D inputs.