Specification	SN74LVC1G373DBVR

Circuit	1:1
Current - Output High, Low [x]	32 mA
Current - Output High, Low [y]	32 mA
Delay Time - Propagation	1 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	SOT-23-6
Supplier Device Package	SOT-23-6
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	1.65 V

SN74LVC1G373 Series

Single D-Type Latch with 3S Output

Part	Supplier Device Package	Mounting Type	Logic Type	Circuit	Package / Case	Output Type	Current - Output High, Low [y]	Current - Output High, Low [x]	Delay Time - Propagation	Operating Temperature [Max]	Operating Temperature [Min]	Independent Circuits	Voltage - Supply [Min]	Voltage - Supply [Max]
Texas Instruments 74LVC1G373DBVRE4	SOT-23-6	Surface Mount	D-Type Transparent Latch	1:1	SOT-23-6	Tri-State	32 mA	32 mA	1 ns	125 °C	-40 °C	1	1.65 V	3.6 V
Texas Instruments SN74LVC1G373DBVR	SOT-23-6	Surface Mount	D-Type Transparent Latch	1:1	SOT-23-6	Tri-State	32 mA	32 mA	1 ns	125 °C	-40 °C	1	1.65 V	5.5 V
Texas Instruments 74LVC1G373DCKRG4	SC-70-6	Surface Mount	D-Type Transparent Latch	1:1	6-TSSOP SC-88 SOT-363	Tri-State	32 mA	32 mA	1 ns	125 °C	-40 °C	1	1.65 V	3.6 V
Texas Instruments SN74LVC1G373YZPR	6-DSBGA	Surface Mount	D-Type Transparent Latch	1:1	6-XFBGA DSBGA	Tri-State	32 mA	32 mA	1 ns	85 °C	-40 °C	1	1.65 V	5.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.48
		10	$ 0.39
		25	$ 0.36
		100	$ 0.27
		250	$ 0.24
		500	$ 0.20
		1000	$ 0.15
	Digi-Reel®	1	$ 0.48
		10	$ 0.39
		25	$ 0.36
		100	$ 0.27
		250	$ 0.24
		500	$ 0.20
		1000	$ 0.15
	Tape & Reel (TR)	3000	$ 0.14
		6000	$ 0.13
		15000	$ 0.12
		30000	$ 0.11
		75000	$ 0.11
Texas Instruments	LARGE T&R	1	$ 0.19
		100	$ 0.13
		250	$ 0.10
		1000	$ 0.07

Description

General part information

SN74LVC1G373 Series

The SN74LVC1G373 device is a single D-type latch designed for 1.65-V to 5.5-V VCCoperation.

This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Documents

Technical documentation and resources

SN74LVC1G373DBVR

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Technical Specifications

SN74LVC1G373 Series

Pricing

Description

SN74LVC1G373 Series

Documents

LVC Characterization Information

Power-Up Behavior of Clocked Devices (Rev. B)

LOGIC Pocket Data Book (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Low-Voltage Logic (LVC) Designer's Guide

Signal Switch Data Book (Rev. A)

Standard Linear & Logic for PCs, Servers & Motherboards

Logic Guide (Rev. AB)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

How to Select Little Logic (Rev. A)

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

Input and Output Characteristics of Digital Integrated Circuits

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Selecting the Right Level Translation Solution (Rev. A)

Understanding Advanced Bus-Interface Products Design Guide

SN74LVC1G373 Single D-Type Latch With 3-State Output datasheet (Rev. F)

Texas Instruments Little Logic Application Report

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

CMOS Power Consumption and CPD Calculation (Rev. B)

Live Insertion

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

TI IBIS File Creation, Validation, and Distribution Processes

Little Logic Guide 2018 (Rev. G)

Design Summary for WCSP Little Logic (Rev. B)

SN74LVC1G373 Series