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ROHM DTDG23YPT100
Discrete Semiconductor Products

2SAR553P5T100

Active
Rohm Semiconductor

PNP, SOT-89, -50V -2A, MEDIUM POWER TRANSISTOR

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Search across all available documentation for this part.

DocumentsTechnical Data Sheet EN2SAR553P5 Thermal Resistance+36
ROHM DTDG23YPT100
Discrete Semiconductor Products

2SAR553P5T100

Active
Rohm Semiconductor

PNP, SOT-89, -50V -2A, MEDIUM POWER TRANSISTOR

Deep-Dive with AI

DocumentsTechnical Data Sheet EN2SAR553P5 Thermal Resistance+36

Technical Specifications

Parameters and characteristics for this part

Specification2SAR553P5T100
Current - Collector (Ic) (Max) [Max]2 A
Current - Collector Cutoff (Max) [Max]1 µA
DC Current Gain (hFE) (Min) @ Ic, Vce [Min]180
Frequency - Transition320 MHz
Mounting TypeSurface Mount
Operating Temperature150 °C
Package / CaseTO-243AA
Power - Max [Max]500 mW
Supplier Device PackageMPT3
Transistor TypePNP
Vce Saturation (Max) @ Ib, Ic0.4 V
Voltage - Collector Emitter Breakdown (Max) [Max]50 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.69
10$ 0.43
100$ 0.27
500$ 0.21
Digi-Reel® 1$ 0.69
10$ 0.43
100$ 0.27
500$ 0.21
N/A 1980$ 0.69
Tape & Reel (TR) 1000$ 0.13
2000$ 0.12
3000$ 0.12
NewarkEach (Supplied on Cut Tape) 1$ 0.55
10$ 0.37
25$ 0.33
50$ 0.29
100$ 0.25
250$ 0.23
500$ 0.20
1000$ 0.16

Description

General part information

2SAR553 Series

Various products are available in lineup developed focusing on energy-saving and high reliability as main concepts, covering from ultra-compact packages to power-packages to meet the needs in market.

Documents

Technical documentation and resources

Technical Data Sheet EN

Datasheet

2SAR553P5 Thermal Resistance

Characteristics Data

Precautions When Measuring the Rear of the Package with a Thermocouple

Thermal Design

About Flammability of Materials

Environmental Data

Method for Monitoring Switching Waveform

Schematic Design & Verification

Explanation for Marking

Package Information

Package Dimensions

Package Information

Part Explanation

Application Note

Notes for Temperature Measurement Using Forward Voltage of PN Junction

Thermal Design

Notes for Temperature Measurement Using Thermocouples

Thermal Design

How to Use LTspice® Models

Schematic Design & Verification

What is a Thermal Model? (Transistor)

Thermal Design

Method for Calculating Junction Temperature from Transient Thermal Resistance Data

Thermal Design

Types and Features of Transistors

Application Note

Temperature derating method for Safe Operating Area (SOA)

Schematic Design & Verification

List of Transistor Package Thermal Resistance

Thermal Design

Anti-Whisker formation - Transistors

Package Information

Taping Information

Package Information

Report of SVHC under REACH Regulation

Environmental Data

How to Use LTspice® Models: Tips for Improving Convergence

Schematic Design & Verification

Measurement Method and Usage of Thermal Resistance RthJC

Thermal Design

How to Create Symbols for PSpice Models

Models

Impedance Characteristics of Bypass Capacitor

Schematic Design & Verification

Two-Resistor Model for Thermal Simulation

Thermal Design

Basics of Thermal Resistance and Heat Dissipation

Thermal Design

Inner Structure

Package Information

Compliance of the RoHS directive

Environmental Data

PCB Layout Thermal Design Guide

Thermal Design

Condition of Soldering / Land Pattern Reference

Package Information

What Is Thermal Design

Thermal Design

Moisture Sensitivity Level - Transistors

Package Information

Calculation of Power Dissipation in Switching Circuit

Schematic Design & Verification

Reliability Test Result

Manufacturing Data

About Export Regulations

Export Information

2SAR553P5 ESD Data

Characteristics Data

Overview of ROHM's Simulation Models(for ICs and Discrete Semiconductors)

Technical Article

Notes for Calculating Power Consumption:Static Operation

Thermal Design

Importance of Probe Calibration When Measuring Power: Deskew

Schematic Design & Verification