Zenode.ai Logo
Beta
Texas Instruments-TS5A3160DCKR Analog Switch Multiplexers Analog Switch Single SPDT 6-Pin SC-70 T/R
Integrated Circuits (ICs)

SN74LVC1G58DCKRG4

Unknown
Texas Instruments

MULTI FUNCTION GATE 1-ELEMENT 2-IN CMOS 6-PIN SC-70 T/R

Deep-Dive with AI

Search across all available documentation for this part.

Texas Instruments-TS5A3160DCKR Analog Switch Multiplexers Analog Switch Single SPDT 6-Pin SC-70 T/R
Integrated Circuits (ICs)

SN74LVC1G58DCKRG4

Unknown
Texas Instruments

MULTI FUNCTION GATE 1-ELEMENT 2-IN CMOS 6-PIN SC-70 T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC1G58DCKRG4
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Logic TypeConfigurable Multiple Function
Mounting TypeSurface Mount
Number of Circuits1
Number of Inputs3
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Output TypeSingle-Ended
Package / Case6-TSSOP, SC-88, SOT-363
Schmitt Trigger InputFalse
Supplier Device PackageSC-70-6
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.47
Digi-Reel® 1$ 0.47
Tape & Reel (TR) 6000$ 0.13
15000$ 0.12
30000$ 0.11
75000$ 0.10
Texas InstrumentsLARGE T&R 1$ 0.23
100$ 0.16
250$ 0.12
1000$ 0.08

Description

General part information

SN74LVC1G58 Series

This configurable multiple-function gate is designed for 1.65-V to 5.5-V VCCoperation.

The SN74LVC1G58 device features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter, and noninverter. All inputs can be connected to VCCor GND.

This device functions as an independent gate, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT–) signals.

Documents

Technical documentation and resources

Understanding Schmitt Triggers (Rev. B)

Application brief

Logic Guide (Rev. AB)

Selection guide

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

LVC Characterization Information

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Configurable Multiple-Function Gate, SN74LVC1G58 datasheet (Rev. N)

Data sheet

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Sequence Supplies With Simple Timers and Logic

Product overview

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Live Insertion

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

How to Select Little Logic (Rev. A)

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Utilizing Configurable Logic in System Design

Application brief

Input and Output Characteristics of Digital Integrated Circuits

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Signal Switch Data Book (Rev. A)

User guide

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

Texas Instruments Little Logic Application Report

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note