
MC74LVX138DR2G
ActiveIC,DECODER/DEMUX,3-TO-8-LINE,LVX-CMOS,SOP,16PIN,PLASTIC ROHS COMPLIANT: YES
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MC74LVX138DR2G
ActiveIC,DECODER/DEMUX,3-TO-8-LINE,LVX-CMOS,SOP,16PIN,PLASTIC ROHS COMPLIANT: YES
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Technical Specifications
Parameters and characteristics for this part
| Specification | MC74LVX138DR2G |
|---|---|
| Circuit | 1 x 3:8 |
| Current - Output High, Low [custom] | 4 mA |
| Current - Output High, Low [custom] | 4 mA |
| Independent Circuits | 1 |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Type | Decoder/Demultiplexer |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 2 V |
| Voltage Supply Source | Single Supply |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.77 | |
| 10 | $ 0.68 | |||
| 25 | $ 0.64 | |||
| 100 | $ 0.48 | |||
| 250 | $ 0.41 | |||
| 500 | $ 0.39 | |||
| 1000 | $ 0.30 | |||
| Digi-Reel® | 1 | $ 0.77 | ||
| 10 | $ 0.68 | |||
| 25 | $ 0.64 | |||
| 100 | $ 0.48 | |||
| 250 | $ 0.41 | |||
| 500 | $ 0.39 | |||
| 1000 | $ 0.30 | |||
| Tape & Reel (TR) | 2500 | $ 0.31 | ||
| 5000 | $ 0.29 | |||
| 7500 | $ 0.28 | |||
| 12500 | $ 0.27 | |||
| 17500 | $ 0.26 | |||
| 25000 | $ 0.26 | |||
| Newark | Each (Supplied on Full Reel) | 1 | $ 0.35 | |
| 3000 | $ 0.34 | |||
| 6000 | $ 0.32 | |||
| 12000 | $ 0.30 | |||
| 18000 | $ 0.28 | |||
| 30000 | $ 0.26 | |||
| ON Semiconductor | N/A | 1 | $ 0.27 | |
Description
General part information
MC74LVX138 Series
The MC74LVX138 is an advanced high speed CMOS 3-to-8 line decoder. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.When the device is enabled, three Binary Select inputs (A0 - A2) determine which one of the outputs (O0 - O7) will go Low. When enable input E3 is held Low or either E2 or E1 is held High, decoding function is inhibited and all outputs go high. E3, E2, and E1 inputs are provided to ease cascade connection and for use as an address decoder for memory systems.
Documents
Technical documentation and resources