Specification	SN74ABT541BDWR

Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Logic Type	Buffer, Non-Inverting
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ABT541B-EP Series

Enhanced product 8-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Supplier Device Package	Logic Type	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type	Number of Bits per Element	Number of Elements	Package / Case	Package / Case	Package / Case [y]	Package / Case [y]	Package / Case [x]
Texas Instruments SN74ABT541BDB	85 °C	-40 °C	20-SSOP	64 mA	32 mA	20-SSOP	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1
Texas Instruments SN74ABT541BN	85 °C	-40 °C	20-DIP	64 mA	32 mA	20-PDIP	Buffer Non-Inverting	Through Hole	4.5 V	5.5 V	3-State	8	1	7.62 mm	0.3 in
Texas Instruments SN74ABT541BDWRG4	85 °C	-40 °C	20-SOIC	64 mA	32 mA	20-SOIC	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1			0.295 in	7.5 mm
Texas Instruments SN74ABT541BDW	85 °C	-40 °C	20-SOIC	64 mA	32 mA	20-SOIC	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1			0.295 in	7.5 mm
Texas Instruments SN74ABT541BDBRG4	85 °C	-40 °C	20-SSOP	64 mA	32 mA	20-SSOP	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1
Texas Instruments SN74ABT541BPWRE4	85 °C	-40 °C	20-TSSOP	64 mA	32 mA	20-TSSOP	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1			4.4 mm		0.173 in
Texas Instruments SN74ABT541BPWR	85 °C	-40 °C	20-TSSOP	64 mA	32 mA	20-TSSOP	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1			4.4 mm		0.173 in
Texas Instruments SN74ABT541BIPWREP	85 °C	-40 °C	20-TSSOP	64 mA	32 mA	20-TSSOP	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1			4.4 mm		0.173 in
Texas Instruments SN74ABT541BDWR	85 °C	-40 °C	20-SOIC	64 mA	32 mA	20-SOIC	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1			0.295 in	7.5 mm
Texas Instruments SN74ABT541BDBRE4	85 °C	-40 °C	20-SSOP	64 mA	32 mA	20-SSOP	Buffer Non-Inverting	Surface Mount	4.5 V	5.5 V	3-State	8	1

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.17
		10	$ 1.04
		25	$ 0.99
		100	$ 0.81
		250	$ 0.76
		500	$ 0.67
		1000	$ 0.53
	Digi-Reel®	1	$ 1.17
		10	$ 1.04
		25	$ 0.99
		100	$ 0.81
		250	$ 0.76
		500	$ 0.67
		1000	$ 0.53
	Tape & Reel (TR)	2000	$ 0.49
		6000	$ 0.47
		10000	$ 0.45
LCSC	Piece	1	$ 1.74
		10	$ 1.48
		30	$ 1.32
		100	$ 1.08
		500	$ 1.01
		1000	$ 0.98
Texas Instruments	LARGE T&R	1	$ 0.86
		100	$ 0.67
		250	$ 0.49
		1000	$ 0.35

Description

General part information

SN74ABT541B-EP Series

The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1orOE2) input is high, all eight outputs are in the high-impedance state.

When VCCis between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Documents

Technical documentation and resources

SN74ABT541BDWR

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SN74ABT541BDWR

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Technical Specifications

SN74ABT541B-EP Series

Pricing

Description

SN74ABT541B-EP Series

Documents

Datasheet

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Quad Flatpack No-Lead Logic Packages (Rev. D)

Input and Output Characteristics of Digital Integrated Circuits

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

LOGIC Pocket Data Book (Rev. B)

Live Insertion

Implications of Slow or Floating CMOS Inputs (Rev. E)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Understanding Advanced Bus-Interface Products Design Guide

Selecting the Right Level Translation Solution (Rev. A)

Logic Guide (Rev. AB)

TI IBIS File Creation, Validation, and Distribution Processes

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Advanced Bus Interface Logic Selection Guide

Designing With Logic (Rev. C)

SN74ABT541B-EP Series