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TVP5154APNPR
Integrated Circuits (ICs)

TVP5160PNP

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Texas Instruments

NTSC/PAL/SECAM/COMPONENT 10-BIT DIGITAL VIDEO DECODER WITH MACROVISIONTM DETECTION, 3D-YC/5-LINE COM

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TVP5154APNPR
Integrated Circuits (ICs)

TVP5160PNP

Active
Texas Instruments

NTSC/PAL/SECAM/COMPONENT 10-BIT DIGITAL VIDEO DECODER WITH MACROVISIONTM DETECTION, 3D-YC/5-LINE COM

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Technical Specifications

Parameters and characteristics for this part

SpecificationTVP5160PNP
ApplicationsLCD TV/Monitor
Mounting TypeSurface Mount
Package / Case128-TQFP Exposed Pad
Supplier Device Package128-HTQFP (14x14)
TypeVideo Decoder
Voltage - Supply, Analog [Max]1.95 V
Voltage - Supply, Analog [Min]1.65 V
Voltage - Supply, Digital [Max] [custom]1.95 V
Voltage - Supply, Digital [Min] [custom]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyN/A 88$ 14.00
7181$ 14.00
Tray 1$ 11.78
10$ 10.83
25$ 10.38
90$ 9.15
270$ 8.70
450$ 8.14
990$ 7.46
Texas InstrumentsJEDEC TRAY (5+1) 1$ 9.22
100$ 8.05
250$ 6.21
1000$ 5.55

Description

General part information

TVP5160 Series

The TVP5160 device is a high quality, digital video decoder that digitizes and decodes all popular baseband analog video formats into digital component video. The TVP5160 decoder supports the A/D conversion of component YPbPr and RGB (SCART) signals, as well as the A/D conversion and decoding of NTSC, PAL, and SECAM composite and S-Video into component YCbCr. Additionally, component progressive signals can be digitized. The chip includes two 11-bit, 60-MSPS, A/D converters (ADCs). Prior to each ADC, each analog channel contains an analog circuit, which clamps the input to a reference voltage and applies a programmable gain and offset. A total of 12 video input terminals can be configured to a combination of YPbPr, RGB, CVBS, and S-Video video inputs.

Progressive component signals are sampled at 2x clock frequency (54 MHz) and are then decimated to the 1x rate. In SCART mode the component inputs and the CVBS inputs are sampled at 54 MHz alternately, then decimated to the 1x rate. Composite or S-Video signals are sampled at 4x the ITU-R BT.601 clock frequency (54 MHz), line-locked for correct pixel alignment, and are then decimated to the 1x rate. CVBS decoding uses advanced 3D Y/C filtering and 2-dimensional complementary 5-line adaptive comb filtering for both the luma and chroma data paths to reduce both cross-luma and cross-chroma artifacts. 3D Y/C color separation may be used on both PAL and NTSC video signals. A chroma trap filter is also available. On CVBS and Y/C inputs, the user can control video characteristics such as hue, contrast, brightness, and saturation via an I2C host port interface. Furthermore, luma peaking with programmable gain is included, as well as a patented color transient improvement (CTI) circuit. Attenuation at higher frequencies or asymmetrical color subcarrier sidebands are compensated using the IF compensation block. Frame adaptive noise reduction may be applied to reduce temporal noise on CVBS, S-Video, or component inputs.

3D noise reduction and 3D Y/C separation may be used at the same time or independently.