74LVC1G32GS,132
ActiveOR GATE, SINGLE, 2 INPUT, 6 PINS, XSON, 74LVC1G32
Deep-Dive with AI
Search across all available documentation for this part.
74LVC1G32GS,132
ActiveOR GATE, SINGLE, 2 INPUT, 6 PINS, XSON, 74LVC1G32
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC1G32GS,132 |
|---|---|
| Current - Output High, Low [x] | 32 mA |
| Current - Output High, Low [y] | 32 mA |
| Current - Quiescent (Max) [Max] | 4 µA |
| Input Logic Level - High [Max] | 2 V |
| Input Logic Level - High [Min] | 1.7 V |
| Input Logic Level - Low [Max] | 0.8 V |
| Input Logic Level - Low [Min] | 0.7 V |
| Logic Type | OR Gate |
| Max Propagation Delay @ V, Max CL | 4 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 6-XFDFN |
| Supplier Device Package | 6-XSON, SOT1202 (1x1) |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 5079 | $ 0.06 | |
| Cut Tape (CT) | 1 | $ 0.42 | ||
| 10 | $ 0.31 | |||
| 25 | $ 0.28 | |||
| 100 | $ 0.20 | |||
| 250 | $ 0.16 | |||
| 500 | $ 0.13 | |||
| 1000 | $ 0.10 | |||
| 2500 | $ 0.09 | |||
| Digi-Reel® | 1 | $ 0.42 | ||
| 10 | $ 0.31 | |||
| 25 | $ 0.28 | |||
| 100 | $ 0.20 | |||
| 250 | $ 0.16 | |||
| 500 | $ 0.13 | |||
| 1000 | $ 0.10 | |||
| 2500 | $ 0.09 | |||
| Tape & Reel (TR) | 5000 | $ 0.08 | ||
| 10000 | $ 0.07 | |||
| 25000 | $ 0.06 | |||
| 50000 | $ 0.06 | |||
| 125000 | $ 0.06 | |||
Description
General part information
74LVC1G32GS Series
The 74LVC1G32 is a single 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Documents
Technical documentation and resources