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48-TSSOP
Integrated Circuits (ICs)

CVMEH22501AIDGGREP

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Texas Instruments

ENHANCED PRODUCT 8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS

48-TSSOP
Integrated Circuits (ICs)

CVMEH22501AIDGGREP

Active
Texas Instruments

ENHANCED PRODUCT 8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS

Technical Specifications

Parameters and characteristics for this part

SpecificationCVMEH22501AIDGGREP
Current - Output High, Low [x]48 mA, 12 mA
Current - Output High, Low [y]12 mA, 64 mA
Mounting TypeSurface Mount
Number of Circuits8-Bit and Dual 1-Bit
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case48-TFSOP
Package / Case0.24 in
Package / Case [custom]6.1 mm
Supplier Device Package48-TSSOP
Voltage - Supply [Max]3.45 V
Voltage - Supply [Min]3.15 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 9.06
10$ 8.19
25$ 7.81
100$ 6.78
250$ 6.47
500$ 5.90
1000$ 5.14
Digi-Reel® 1$ 9.06
10$ 8.19
25$ 7.81
100$ 6.78
250$ 6.47
500$ 5.90
1000$ 5.14
Tape & Reel (TR) 2000$ 4.95
Texas InstrumentsLARGE T&R 1$ 7.98
100$ 6.50
250$ 5.11
1000$ 4.34

Description

General part information

SN74VMEH22501A-EP Series

The SN74VMEH22501A-EP 8-bit universal bus transceiver has two integral 1-bit three-wire bus transceivers and is designed for 3.3-V VCCoperation with 5-V tolerant inputs. The UBT transceiver allows transparent, latched, and flip-flop modes of data transfer, and the separate LVTTL input and outputs on the bus transceivers provide a feedback path for control and diagnostics monitoring. This device provides a high-speed interface between cards operating at LVTTL logic levels and VME64, VME64x, or VME320(2)backplane topologies.

The SN74VMEH22501A-EP device is pin-for-pin compatible to the SN74VMEH22501 device (SCES357), but operates at a wider operating temperature range.

High-speed backplane operation is a direct result of the improved OEC circuitry and high drive that has been designed and tested into the VME64x backplane model. The B-port I/Os are optimized for driving large capacitive loads and include pseudo-ETL input thresholds (½ VCC±50 mV) for increased noise immunity. These specifications support the 2eVME protocols in VME64x (ANSI/VITA 1.1) and 2eSST protocols in VITA 1.5.