Specification	SN74ABT843DBR

Circuit	9
Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Delay Time - Propagation	4.4 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	24-SSOP
Supplier Device Package	24-SSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ABT843 Series

9-Bit Bus-Interface D-Type Latches With 3-State Outputs

Part	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Independent Circuits	Delay Time - Propagation	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Logic Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Package / Case	Package / Case	Output Type	Circuit	Mounting Type	Package / Case [custom]	Package / Case [custom]	Package / Case [custom]	Package / Case [custom]
Texas Instruments SN74ABT843NT	64 mA	32 mA	1	4.4 ns	24-PDIP	85 °C	-40 °C	D-Type Transparent Latch	4.5 V	5.5 V	0.3 in	24-DIP	7.62 mm	Tri-State	9	Through Hole
Texas Instruments SN74ABT843DBRG4	64 mA	32 mA	1	4.4 ns	24-SSOP	85 °C	-40 °C	D-Type Transparent Latch	4.5 V	5.5 V		24-SSOP		Tri-State	9	Surface Mount
Texas Instruments SN74ABT843NSR	64 mA	32 mA	1	4.4 ns	24-SO	85 °C	-40 °C	D-Type Transparent Latch	4.5 V	5.5 V		24-SOIC		Tri-State	9	Surface Mount	5.3 mm	0.209 in
Texas Instruments SN74ABT843DWR	64 mA	32 mA	1	4.4 ns	24-SOIC	85 °C	-40 °C	D-Type Transparent Latch	4.5 V	5.5 V		24-SOIC		Tri-State	9	Surface Mount			7.5 mm	0.295 in
Texas Instruments SN74ABT843DBR	64 mA	32 mA	1	4.4 ns	24-SSOP	85 °C	-40 °C	D-Type Transparent Latch	4.5 V	5.5 V		24-SSOP		Tri-State	9	Surface Mount
Texas Instruments SN74ABT843NSRE4	64 mA	32 mA	1	4.4 ns	24-SO	85 °C	-40 °C	D-Type Transparent Latch	4.5 V	5.5 V		24-SOIC		Tri-State	9	Surface Mount	5.3 mm	0.209 in
Texas Instruments SN74ABT843DW	64 mA	32 mA	1	4.4 ns	24-SOIC	85 °C	-40 °C	D-Type Transparent Latch	4.5 V	5.5 V		24-SOIC		Tri-State	9	Surface Mount			7.5 mm	0.295 in

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 2.06
		10	$ 1.85
		25	$ 1.74
		100	$ 1.49
		250	$ 1.40
		500	$ 1.22
		1000	$ 1.01
	Digi-Reel®	1	$ 2.06
		10	$ 1.85
		25	$ 1.74
		100	$ 1.49
		250	$ 1.40
		500	$ 1.22
		1000	$ 1.01
	Tape & Reel (TR)	2000	$ 0.94
		6000	$ 0.91
		10000	$ 0.87
Texas Instruments	LARGE T&R	1	$ 1.55
		100	$ 1.28
		250	$ 0.92
		1000	$ 0.69

Description

General part information

SN74ABT843 Series

The 'ABT843 9-bit latches are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The nine transparent D-type latches provide true data at the outputs.

A buffered output-enable (OE\) input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The outputs are also in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

Documents

Technical documentation and resources

SN74ABT843DBR

Deep-Dive with AI

SN74ABT843DBR

Deep-Dive with AI

Technical Specifications

SN74ABT843 Series

Pricing

Description

SN74ABT843 Series

Documents

Datasheet

Designing With Logic (Rev. C)

Quad Flatpack No-Lead Logic Packages (Rev. D)

LOGIC Pocket Data Book (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Understanding Advanced Bus-Interface Products Design Guide

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Advanced Bus Interface Logic Selection Guide

Live Insertion

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Input and Output Characteristics of Digital Integrated Circuits

Power-Up Behavior of Clocked Devices (Rev. B)

TI IBIS File Creation, Validation, and Distribution Processes

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Selecting the Right Level Translation Solution (Rev. A)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Logic Guide (Rev. AB)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

SN74ABT843 Series