Integrated Circuits (ICs)

CLVC374AQPWRG4Q1

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AUTOMOTIVE CATALOG OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsUnderstanding Advanced Bus-Interface Products Design Guide 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)+27

Integrated Circuits (ICs)

CLVC374AQPWRG4Q1

Active

Texas Instruments

AUTOMOTIVE CATALOG OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsUnderstanding Advanced Bus-Interface Products Design Guide 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)+27

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	CLVC374AQPWRG4Q1

Clock Frequency	100 MHz
Current - Output High, Low	24 mA
Current - Quiescent (Iq)	10 µA
Function	Standard
Grade	Automotive
Input Capacitance	4 pF
Max Propagation Delay @ V, Max CL	8.5 ns
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	20-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Qualification	AEC-Q100
Supplier Device Package	20-TSSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2 V

SN74LVC374A-Q1 Series

Automotive Catalog Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Part	Mounting Type	Output Type	Function	Current - Output High, Low	Package / Case [y]	Package / Case	Package / Case [x]	Current - Quiescent (Iq)	Max Propagation Delay @ V, Max CL	Qualification	Input Capacitance	Clock Frequency	Supplier Device Package	Number of Elements	Operating Temperature [Min]	Operating Temperature [Max]	Grade	Voltage - Supply [Max]	Voltage - Supply [Min]	Type	Trigger Type	Number of Bits per Element
Texas Instruments CLVC374AQPWRG4Q1	Surface Mount	Non-Inverted Tri-State	Standard	24 mA	4.4 mm	20-TSSOP	0.173 in	10 µA	8.5 ns	AEC-Q100	4 pF	100 MHz	20-TSSOP	1	-40 °C	125 °C	Automotive	3.6 V	2 V	D-Type	Positive Edge	8

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.97
		10	$ 0.87
		25	$ 0.82
		100	$ 0.68
		250	$ 0.63
		500	$ 0.56
		1000	$ 0.44
	Digi-Reel®	1	$ 0.97
		10	$ 0.87
		25	$ 0.82
		100	$ 0.68
		250	$ 0.63
		500	$ 0.56
		1000	$ 0.44
	Tape & Reel (TR)	2000	$ 0.36
Texas Instruments	LARGE T&R	1	$ 0.72
		100	$ 0.55
		250	$ 0.41
		1000	$ 0.29

Description

General part information

SN74LVC374A-Q1 Series

The SN74LVC374A octal edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCCoperation.

This device features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

Documents

Technical documentation and resources

CLVC374AQPWRG4Q1

Deep-Dive with AI

CLVC374AQPWRG4Q1

Deep-Dive with AI

Technical Specifications

SN74LVC374A-Q1 Series

Pricing

Description

SN74LVC374A-Q1 Series

Documents

Understanding Advanced Bus-Interface Products Design Guide

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Input and Output Characteristics of Digital Integrated Circuits

LOGIC Pocket Data Book (Rev. B)

Live Insertion

Implications of Slow or Floating CMOS Inputs (Rev. E)

CMOS Power Consumption and CPD Calculation (Rev. B)

Low-Voltage Logic (LVC) Designer's Guide

Standard Linear & Logic for PCs, Servers & Motherboards

TI IBIS File Creation, Validation, and Distribution Processes

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

LVC Characterization Information

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Logic Guide (Rev. AB)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

Selecting the Right Level Translation Solution (Rev. A)

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs datasheet (Rev. B)

Texas Instruments Little Logic Application Report

Signal Switch Data Book (Rev. A)

Little Logic Guide 2018 (Rev. G)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

How to Select Little Logic (Rev. A)

Automotive Logic Devices Brochure

Power-Up Behavior of Clocked Devices (Rev. B)

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Design Summary for WCSP Little Logic (Rev. B)

SN74LVC374A-Q1 Series