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SN74ALS996DWR

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Texas Instruments

OCTAL D-TYPE EDGE-TRIGGERED READ-BACK LATCHES

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SOIC (DW)
Integrated Circuits (ICs)

SN74ALS996DWR

Active
Texas Instruments

OCTAL D-TYPE EDGE-TRIGGERED READ-BACK LATCHES

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ALS996DWR
Circuit [custom]8
Circuit [custom]8
Current - Output High, Low [custom]400 µA
Current - Output High, Low [custom]8 mA
Delay Time - Propagation5 ns
Independent Circuits1
Logic TypeD-Type Transparent Latch
Mounting TypeSurface Mount
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Output TypeTri-State
Package / Case24-SOIC
Package / Case [custom]7.5 mm
Package / Case [custom]0.295 in
Supplier Device Package24-SOIC
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 14.64
Digi-Reel® 1$ 14.64
Tape & Reel (TR) 2000$ 8.92
Texas InstrumentsLARGE T&R 1$ 13.18
100$ 11.51
250$ 8.88
1000$ 7.94

Description

General part information

SN74ALS996 Series

These 8-bit latches are designed specifically for storing the contents of the input data bus and providing the capability of reading back the stored data onto the input data bus. The Q outputs are designed with bus-driving capability.

The edge-triggered flip-flops enter the data on the low-to-high transition of the clock (CLK) input when the enable () input is low. Data can be read back onto the data inputs by taking the read () input low, in addition to havinglow. When EN\ is high, both the read-back and write modes are disabled. Transitions onshould only be made with CLK high to prevent false clocking.

The polarity of the Q outputs can be controlled by the polarity (T/C\) input. When T/C\ is high, Q is the same as is stored in the flip-flops. When T/C\ is low, the output data is inverted. The Q outputs can be placed in the high-impedance state by taking the output-enable () input high.does not affect the internal operation of the register. Old data can be retained or new data can be entered while the outputs are off.