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8-SOIC
Integrated Circuits (ICs)

CAT1021WI-25-GT3

Obsolete
ON Semiconductor

EEPROM SERIAL 2-KB I<SUP>2</SUP>C CPU SUPERVISOR

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8-SOIC
Integrated Circuits (ICs)

CAT1021WI-25-GT3

Obsolete
ON Semiconductor

EEPROM SERIAL 2-KB I<SUP>2</SUP>C CPU SUPERVISOR

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationCAT1021WI-25-GT3
Mounting TypeSurface Mount
Number of Voltages Monitored1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputOpen Drain or Open Collector
Package / Case8-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
ResetActive High/Active Low
Reset Timeout130 ms
Supplier Device Package8-SOIC
TypeSimple Reset/Power-On Reset
Voltage - Threshold2.55 V

Pricing

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Description

General part information

CAT1021 Series

The CAT1021 is a complete memory and supervisory solution for microcontroller based systems. A EEPROM Serial 2-Kb I2C CPU Supervisor and a system power supervisor with brown-out protection are integrated together in low power CMOS technology. Memory interface is via a 400 kHz I²C bus.The CAT1021 provides a precision VCCsense circuit and two open drain outputs: one (RESET) drives high and the other (RESET) drives low whenever VCCfalls below the reset threshold voltage. The CAT1021 also has a Write Protect input (WP). Write operations are disabled if WP is connected to a logic high.The supervisor has a 1.6 second watchdog timer circuit that resets a system to a known state if software or a hardware glitch halts or 'hangs' the system. The watchdog timer monitors the SDA signal.The power supply monitor and reset circuit protect memory and system controllers during power up/down and against brownout conditions. Five reset threshold voltages support 5.0 V, 3.3 V and 3.0 V systems. If power supply voltages are out of tolerance reset signals become active, preventing the system microcontroller, ASIC or peripherals from operating. Reset signals become inactive typically 200 ms after the supply voltage exceeds the reset threshold level. With both active high and low reset signals, interface to microcontrollers and other ICs is simple. In addition, theRESETpin or a separate input,MR, can be used as an input for push-button manual reset capability.The on-chip, 2 k-bit EEPROM memory features a 16-byte page. In addition, hardware data protection is provided by a VCCsense circuit that prevents writes to memory whenever VCCfalls below the reset threshold or until VCCreaches the reset threshold during power up.Available packages include an 8-pin DIP, 8-pin SOIC, 8-pin TSSOP, 8-pin TDFN and 8-pin MSOP. The TDFN packa

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Technical documentation and resources