
DAC5682ZIRGCR
ActiveDUAL-CHANNEL, 16-BIT, 1.0-GSPS, 1X-4X INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC)
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DAC5682ZIRGCR
ActiveDUAL-CHANNEL, 16-BIT, 1.0-GSPS, 1X-4X INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC)
Technical Specifications
Parameters and characteristics for this part
| Specification | DAC5682ZIRGCR |
|---|---|
| Architecture | Current Sink |
| Data Interface | LVDS - Parallel |
| Differential Output | True |
| INL/DNL (LSB) | 4 LSB, 2 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 16 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Current - Unbuffered |
| Package / Case | 64-VFQFN Exposed Pad |
| Reference Type | External, Internal |
| Settling Time | 10.4 ns |
| Supplier Device Package | 64-VQFN (9x9) |
| Voltage - Supply, Analog [Max] | 3.6 V |
| Voltage - Supply, Analog [Min] | 3 V |
| Voltage - Supply, Digital [Max] | 1.9 V |
| Voltage - Supply, Digital [Min] | 1.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 2000 | $ 56.80 | |
| Texas Instruments | LARGE T&R | 1 | $ 69.52 | |
| 100 | $ 61.80 | |||
| 250 | $ 50.80 | |||
| 1000 | $ 45.44 | |||
Description
General part information
DAC5682Z Series
The DAC5682Z is a dual-channel 16-bit 1.0 GSPS DAC with wideband LVDS data input, integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference. The DAC5682Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.
The DAC5682Z integrates a wideband LVDS port with on-chip termination. Full-rate input data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.
The DAC5682Z allows both complex or real output. An optional Fs/4 coarse mixer in complex mode provides coarse frequency upconversion and the dual DAC output produces a complex Hilbert Transform pair. An external RF quadrature modulator then performs the final single sideband up-conversion. The interpolation filters and complex coarse mixers efficiently provide frequency plan flexibility while enabling higher output DAC rates to simplify image rejection filtering.
Documents
Technical documentation and resources