8523CGLF
ObsoleteLOW SKEW,1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER
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8523CGLF
ObsoleteLOW SKEW,1-TO-4 DIFFERENTIAL-TO-HSTL FANOUT BUFFER
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 8523CGLF |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 650 MHz |
| Input | HSTL, HCSL, CML, SSTL, LVPECL, LVDS, LVHSTL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | HSTL |
| Package / Case | 20-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Ratio - Input:Output [custom] | 2:4 |
| Supplier Device Package | 20-TSSOP |
| Type | Fanout Buffer (Distribution), Multiplexer |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 22 | $ 22.73 | |
Description
General part information
8523 Series
The 8523 is a low skew, high performance 1-to-4 Differential-to-HSTL Fanout Buffer. The 8523 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8523 ideal for those applications demanding well defined performance and repeatability.
Documents
Technical documentation and resources