MAX5894EGK+D
Active14-BIT, 500MSPS, INTERPOLATING AND MODULATING DUAL DAC WITH CMOS INPUTS
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MAX5894EGK+D
Active14-BIT, 500MSPS, INTERPOLATING AND MODULATING DUAL DAC WITH CMOS INPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | MAX5894EGK+D |
|---|---|
| Architecture | Oversampling Interpolating DAC |
| Data Interface | Parallel |
| Differential Output | True |
| INL/DNL (LSB) | ±0.5, ±1 |
| Mounting Type | Surface Mount |
| Number of Bits | 14 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 C |
| Output Type | Current - Unbuffered |
| Package / Case | 68-VFQFN Exposed Pad |
| Reference Type | Internal, External |
| Settling Time | 11 ns |
| Supplier Device Package | 68-QFN |
| Supplier Device Package [x] | 10 |
| Supplier Device Package [y] | 10 |
| Voltage - Supply, Analog [Max] | 3.465 V, 1.89 V |
| Voltage - Supply, Analog [Min] | 1.71 V, 3.135 V |
| Voltage - Supply, Digital [Max] [custom] | 1.89 V |
| Voltage - Supply, Digital [Min] [custom] | 1.71 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 1 | $ 48.42 | |
| Tube | 1 | $ 41.25 | ||
| 10 | $ 31.43 | |||
| 25 | $ 28.92 | |||
| 100 | $ 26.12 | |||
| 250 | $ 25.74 | |||
Description
General part information
MAX5894 Series
The MAX5894 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter (DAC) offers superior dynamic performance and is optimized for high-performance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x interpolating filter, a digital quadrature modulator, and dual 14-bit, high-speed DACs on a single integrated circuit. At 30MHz output frequency and 500Msps update rate, the in-band SFDR is 86dBc while consuming 1.1W. The device also delivers 73dB ACLR for two-carrier WCDMA at a 61.44MHz output frequency.The selectable interpolating filters allow lower input data rates while taking advantage of the high DAC update rates. These linear-phase interpolation filters ease reconstruction filter requirements and enhance the passband dynamic performance. Individual offset and gain programmability allow the user to calibrate out local oscillator (LO) feedthrough and sideband suppression errors generated by analog quadrature modulators.The MAX5894 features a fIM/4 digital image-reject modulator. This modulator generates a quadrature-modulated IF signal that can be presented to an analog I/Q modulator to complete the upconversion process. A second digital modulation mode allows the signal to be frequency-translated with image pairs at fIM/2 or fIM/4.The MAX5894 features a standard 1.8V CMOS, 3.3V tolerant data input bus for easy interface. A 3.3V SPI™ port is provided for mode configuration. The programmable modes include the selection of 2x/4x/8x interpolating filters, fIM/2, fIM/4 or no digital quadrature modulation with image rejection, channel gain and offset adjustment, and offset binary or two's complement data interface.Pin-compatible 12- and 16-bit devices are also available. Refer to theMAX5893data sheet for the 12-bit version and theMAX5895data sheet for the 16-bit version.See a parametric table of the complete family of pin-compatible 12-/14-/16-bit high-speed DACs.ApplicationsAnalog Quadrature Modulation ArchitecturesBase Stations: 3G UMTS, CDMA, and GSMBroadband Cable InfrastructureBroadband Wireless TransmittersInstrumentation and Automatic Test Equipment (ATE)
Documents
Technical documentation and resources