
SN74LVTH652IPWREP
ObsoleteBUS XCVR SINGLE 8-CH 3-ST 24-PIN TSSOP T/R
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SN74LVTH652IPWREP
ObsoleteBUS XCVR SINGLE 8-CH 3-ST 24-PIN TSSOP T/R
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVTH652IPWREP |
|---|---|
| Current - Output High, Low [custom] | 64 mA |
| Current - Output High, Low [custom] | 32 mA |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | 3-State |
| Package / Case | 24-TSSOP |
| Package / Case | 0.173 in, 4.4 mm |
| Supplier Device Package | 24-TSSOP |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 2.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
SN74LVTH652 Series
These bus transceivers and registers are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.
The ’LVTH652 devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers.
Output-enable (OEAB and OEBA\) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between real-time and stored data. A low input selects real-time data and a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’LVTH652 devices.
Documents
Technical documentation and resources