Specification	SN74ABT533AN

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Delay Time - Propagation	4.9 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Through Hole
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-DIP
Package / Case	7.62 mm
Package / Case	0.3 in
Supplier Device Package	20-PDIP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ABT533A Series

Octal Transparent D-Type Latches With 3-State Outputs

Part	Output Type	Circuit [custom]	Circuit [custom]	Package / Case	Package / Case [y]	Package / Case [y]	Supplier Device Package	Independent Circuits	Delay Time - Propagation	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Min]	Voltage - Supply [Max]	Logic Type	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Package / Case [x]	Package / Case	Package / Case
Texas Instruments SN74ABT533ADW	Tri-State	8	8	20-SOIC	0.295 in	7.5 mm	20-SOIC	1	4.9 ns	64 mA	32 mA	4.5 V	5.5 V	D-Type Transparent Latch	85 °C	-40 °C	Surface Mount
Texas Instruments SN74ABT533APW	Tri-State	8	8	20-TSSOP	4.4 mm		20-TSSOP	1	4.9 ns	64 mA	32 mA	4.5 V	5.5 V	D-Type Transparent Latch	85 °C	-40 °C	Surface Mount	0.173 in
Texas Instruments SN74ABT533ADWRG4	Tri-State	8	8	20-SOIC	0.295 in	7.5 mm	20-SOIC	1	4.9 ns	64 mA	32 mA	4.5 V	5.5 V	D-Type Transparent Latch	85 °C	-40 °C	Surface Mount
Texas Instruments SN74ABT533ADBR	Tri-State	8	8	20-SSOP			20-SSOP	1	4.9 ns	64 mA	32 mA	4.5 V	5.5 V	D-Type Transparent Latch	85 °C	-40 °C	Surface Mount
Texas Instruments SN74ABT533APWR	Tri-State	8	8	20-TSSOP	4.4 mm		20-TSSOP	1	4.9 ns	64 mA	32 mA	4.5 V	5.5 V	D-Type Transparent Latch	85 °C	-40 °C	Surface Mount	0.173 in
Texas Instruments SN74ABT533AN	Tri-State	8	8	20-DIP			20-PDIP	1	4.9 ns	64 mA	32 mA	4.5 V	5.5 V	D-Type Transparent Latch	85 °C	-40 °C	Through Hole		7.62 mm	0.3 in

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 1.06
		20	$ 0.95
		40	$ 0.90
		100	$ 0.77
		260	$ 0.72
		500	$ 0.63
Texas Instruments	TUBE	1	$ 1.14
		100	$ 0.94
		250	$ 0.67
		1000	$ 0.51

Description

General part information

SN74ABT533A Series

These octal transparent D-type latches with 3-state outputs are designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

When the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the Q\ outputs are latched at the inverse of the levels at the D inputs.

A buffered output-enable () input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

Documents

Technical documentation and resources

SN74ABT533AN

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SN74ABT533AN

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Technical Specifications

SN74ABT533A Series

Pricing

Description

SN74ABT533A Series

Documents

LOGIC Pocket Data Book (Rev. B)

Power-Up Behavior of Clocked Devices (Rev. B)

Advanced Bus Interface Logic Selection Guide

Implications of Slow or Floating CMOS Inputs (Rev. E)

Quad Flatpack No-Lead Logic Packages (Rev. D)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Input and Output Characteristics of Digital Integrated Circuits

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

TI IBIS File Creation, Validation, and Distribution Processes

Selecting the Right Level Translation Solution (Rev. A)

Designing With Logic (Rev. C)

Live Insertion

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Understanding Advanced Bus-Interface Products Design Guide

Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. D)

Logic Guide (Rev. AB)

SN74ABT533A Series