
CAV25256VE-GT3
ActiveEEPROM SERIAL-SPI 256K-BIT 32K X 8 3.3V/5V 8-PIN SOIC T/R

CAV25256VE-GT3
ActiveEEPROM SERIAL-SPI 256K-BIT 32K X 8 3.3V/5V 8-PIN SOIC T/R
Technical Specifications
Parameters and characteristics for this part
| Specification | CAV25256VE-GT3 |
|---|---|
| Clock Frequency | 10 MHz |
| Grade | Automotive |
| Memory Format | EEPROM |
| Memory Interface | SPI |
| Memory Organization | 32K x 8 |
| Memory Size | 32 KB |
| Memory Type | Non-Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 8-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Qualification | AEC-Q100 |
| Supplier Device Package | 8-SOIC |
| Technology | EEPROM |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2.5 V |
| Write Cycle Time - Word, Page | 5 ms |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.96 | |
| 10 | $ 0.88 | |||
| 25 | $ 0.87 | |||
| 50 | $ 0.86 | |||
| 100 | $ 0.77 | |||
| 250 | $ 0.76 | |||
| 500 | $ 0.75 | |||
| 1000 | $ 0.72 | |||
| Digi-Reel® | 1 | $ 0.96 | ||
| 10 | $ 0.88 | |||
| 25 | $ 0.87 | |||
| 50 | $ 0.86 | |||
| 100 | $ 0.77 | |||
| 250 | $ 0.76 | |||
| 500 | $ 0.75 | |||
| 1000 | $ 0.72 | |||
| Tape & Reel (TR) | 3000 | $ 0.68 | ||
| 6000 | $ 0.66 | |||
| 15000 | $ 0.64 | |||
| LCSC | Piece | 1 | $ 1.80 | |
| 200 | $ 0.70 | |||
| 500 | $ 0.67 | |||
| 1000 | $ 0.66 | |||
| Newark | Each (Supplied on Full Reel) | 3000 | $ 0.66 | |
| 6000 | $ 0.63 | |||
| 12000 | $ 0.56 | |||
| 18000 | $ 0.54 | |||
| 30000 | $ 0.52 | |||
| ON Semiconductor | N/A | 1 | $ 0.56 | |
Description
General part information
CAV25256 Series
The CAV25256 is a EEPROM Serial 256-Kb SPI - Automotive Grade device internally organized as 32Kx8 bits. This features a 64-byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. TheHOLDinput may be used to pause any serial communication with the CAV25256 device. The device features software and hardware write protection, including partial as well as full array protection.On-Chip ECC (Error Correction Code) makes the device suitable for high reliability applications.
Documents
Technical documentation and resources