
859S0424BGILF
Obsolete4:4 DIFFERENTIAL-TO-LVPECL/LVDS CLOCK MULTIPLEXER
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859S0424BGILF
Obsolete4:4 DIFFERENTIAL-TO-LVPECL/LVDS CLOCK MULTIPLEXER
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Technical Specifications
Parameters and characteristics for this part
| Specification | 859S0424BGILF |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 3 GHz |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVDS, CML, LVPECL |
| Package / Case | 24-TSSOP |
| Package / Case | 0.173 in, 4.4 mm |
| Ratio - Input:Output | 4:4 |
| Supplier Device Package | 24-TSSOP |
| Type | Fanout Buffer (Distribution), Multiplexer |
| Voltage - Supply [Max] | 2.625 V, 3.465 V |
| Voltage - Supply [Min] | 2.375 V, 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
859S0424I Series
The 859S0424I is a 4:4 Differential-to-LVPECL/ LVDS Clock Multiplexer which can operate up to 3GHz. The outputs for this device can either be programmed to give LVPECL or LVDS levels. The 859S0424I has four selectable differential PCLKx, nPCLKx clock inputs. The PCLKx, nPCLKx input pairs can accept LVPECL, LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits.
Documents
Technical documentation and resources