
CD4017BPWR
ActiveCMOS DECADE COUNTER WITH 10 DECODED OUTPUTS
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CD4017BPWR
ActiveCMOS DECADE COUNTER WITH 10 DECODED OUTPUTS
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Technical Specifications
Parameters and characteristics for this part
| Specification | CD4017BPWR |
|---|---|
| Count Rate | 5.5 MHz |
| Direction | Up |
| Logic Type | Counter, Decade |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 10 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 16-TSSOP |
| Package / Case [x] | 0.173 in |
| Package / Case [y] | 4.4 mm |
| Reset | Asynchronous |
| Supplier Device Package | 16-TSSOP |
| Timing | Synchronous |
| Trigger Type | Negative, Positive |
| Voltage - Supply [Max] | 18 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.66 | |
| 10 | $ 0.57 | |||
| 25 | $ 0.53 | |||
| 100 | $ 0.42 | |||
| 250 | $ 0.39 | |||
| 500 | $ 0.33 | |||
| 1000 | $ 0.26 | |||
| Digi-Reel® | 1 | $ 0.66 | ||
| 10 | $ 0.57 | |||
| 25 | $ 0.53 | |||
| 100 | $ 0.42 | |||
| 250 | $ 0.39 | |||
| 500 | $ 0.33 | |||
| 1000 | $ 0.26 | |||
| Tape & Reel (TR) | 2000 | $ 0.23 | ||
| 6000 | $ 0.22 | |||
| 10000 | $ 0.20 | |||
| 50000 | $ 0.19 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.32 | |
| 100 | $ 0.22 | |||
| 250 | $ 0.17 | |||
| 1000 | $ 0.11 | |||
Description
General part information
CD4017B-MIL Series
CD4017B and CD4022B are 5-stage and 4-stage Johnson counters having 10 and 8 decoded outputs, respectively. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times.
These counters are advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT siganl is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded output are normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A CARRY-OUT signal completes on cycle every 10 clock input cycles in the CD4017B or every 8 clock input cycles in the CD4022B and is used to ripple-clock the succeeding device in a multi-device counting chain.
The CD4017B and CD4022B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). The CD4017B types also are supplied in 16-lead small-outline packages (M and M96 suffixes).
Documents
Technical documentation and resources